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Searched refs:ICL_PORT_DPLL_DEFAULT (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.h172 ICL_PORT_DPLL_DEFAULT, enumerator
H A Dintel_dpll_mgr.c3153 enum icl_port_dpll_id port_dpll_id = ICL_PORT_DPLL_DEFAULT; in icl_update_active_dpll()
3174 &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_compute_combo_phy_dpll()
3190 icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT); in icl_compute_combo_phy_dpll()
3206 &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_get_combo_phy_dpll()
3265 &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_compute_tc_phy_dplls()
3269 port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_compute_tc_phy_dplls()
3298 &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_get_tc_phy_dplls()
3302 port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_get_tc_phy_dplls()
3330 port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_get_tc_phy_dplls()
3381 for (id = ICL_PORT_DPLL_DEFAULT; i in icl_put_dplls()
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H A Dintel_tc.c1172 is_connected = port_pll_type == ICL_PORT_DPLL_DEFAULT; in tc_phy_is_connected()
1180 port_pll_type == ICL_PORT_DPLL_DEFAULT ? "tbt" : "non-tbt"); in tc_phy_is_connected()
1478 enum icl_port_dpll_id pll_type = ICL_PORT_DPLL_DEFAULT; in tc_port_has_active_links()
H A Dintel_ddi.c3832 enum icl_port_dpll_id port_dpll_id = ICL_PORT_DPLL_DEFAULT; in intel_ddi_get_clock()
3921 return ICL_PORT_DPLL_DEFAULT; in icl_ddi_tc_port_pll_type()
3924 return ICL_PORT_DPLL_DEFAULT; in icl_ddi_tc_port_pll_type()
3934 return ICL_PORT_DPLL_DEFAULT; in intel_ddi_port_pll_type()
3952 port_dpll_id = ICL_PORT_DPLL_DEFAULT; in icl_ddi_tc_get_clock()
H A Dintel_cx0_phy.c2995 return ICL_PORT_DPLL_DEFAULT; in intel_mtl_port_pll_type()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.h162 ICL_PORT_DPLL_DEFAULT, enumerator
H A Dintel_dpll_mgr.c3485 enum icl_port_dpll_id port_dpll_id = ICL_PORT_DPLL_DEFAULT; in icl_update_active_dpll()
3515 &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_get_combo_phy_dpll()
3582 port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_get_tc_phy_dplls()
3626 port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_get_tc_phy_dplls()
3660 for (id = ICL_PORT_DPLL_DEFAULT; id < ICL_PORT_DPLL_COUNT; id++) { in icl_put_dplls()
H A Dintel_display.c10875 port_dpll_id = ICL_PORT_DPLL_DEFAULT; in icl_get_ddi_pll()
10887 port_dpll_id = ICL_PORT_DPLL_DEFAULT; in icl_get_ddi_pll()

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