Searched refs:ICC_PMR_EL1 (Results 1 - 5 of 5) sorted by relevance
| /kernel/liteos_a/arch/arm/include/ |
| H A D | gic_v3.h | 43 #define ICC_PMR_EL1 "S3_0_C4_C6_0" macro
124 __asm__ volatile("msr " ICC_PMR_EL1 ", %0" ::"r"(val)); in GiccSetPmr()
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| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| H A D | arch_gicv3.h | 51 CPUIF_MAP(ICC_PMR, ICC_PMR_EL1)
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| /kernel/linux/linux-6.6/arch/arm/include/asm/ |
| H A D | arch_gicv3.h | 52 CPUIF_MAP(ICC_PMR, ICC_PMR_EL1)
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| /kernel/linux/linux-5.10/drivers/irqchip/ |
| H A D | irq-gic-v3.c | 999 write_gicreg(DEFAULT_PMR_VALUE, ICC_PMR_EL1); in gic_cpu_sys_reg_init()
1696 pr_info("Pseudo-NMIs enabled using %s ICC_PMR_EL1 synchronisation\n", in gic_enable_nmi_support()
1704 * the ICC_PMR_EL1 register and the priority that software assigns to in gic_enable_nmi_support()
1707 * GICD_CTRL.DS | SCR_EL3.FIQ | ICC_PMR_EL1 | Group 1 priority in gic_enable_nmi_support()
1718 * In the first two cases, where ICC_PMR_EL1 and the interrupt priority in gic_enable_nmi_support()
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| /kernel/linux/linux-6.6/drivers/irqchip/ |
| H A D | irq-gic-v3.c | 795 * DAIF.IF (and update ICC_PMR_EL1 to mask regular IRQs) prior to returning,
830 * DAIF.IF (and ICC_PMR_EL1) unchanged.
1152 write_gicreg(DEFAULT_PMR_VALUE, ICC_PMR_EL1); in gic_cpu_sys_reg_init()
1962 pr_info("Pseudo-NMIs enabled using %s ICC_PMR_EL1 synchronisation\n", in gic_enable_nmi_support()
1970 * ICC_PMR_EL1 register and the priority that software assigns to in gic_enable_nmi_support()
1973 * GICD_CTRL.DS | SCR_EL3.FIQ | ICC_PMR_EL1 | Group 1 priority in gic_enable_nmi_support()
1984 * In the first two cases, where ICC_PMR_EL1 and the interrupt priority in gic_enable_nmi_support()
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