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Searched refs:HSW_CACHEABILITY_CONTROL (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
H A Dintel_gtt.h92 #define HSW_CACHEABILITY_CONTROL(bits) ((((bits) & 0x7) << 1) | \ macro
94 #define HSW_WB_LLC_AGE3 HSW_CACHEABILITY_CONTROL(0x2)
95 #define HSW_WB_LLC_AGE0 HSW_CACHEABILITY_CONTROL(0x3)
96 #define HSW_WB_ELLC_LLC_AGE3 HSW_CACHEABILITY_CONTROL(0x8)
97 #define HSW_WB_ELLC_LLC_AGE0 HSW_CACHEABILITY_CONTROL(0xb)
98 #define HSW_WT_ELLC_LLC_AGE3 HSW_CACHEABILITY_CONTROL(0x7)
99 #define HSW_WT_ELLC_LLC_AGE0 HSW_CACHEABILITY_CONTROL(0x6)
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/
H A Dintel_gtt.h110 #define HSW_CACHEABILITY_CONTROL(bits) ((((bits) & 0x7) << 1) | \ macro
112 #define HSW_WB_LLC_AGE3 HSW_CACHEABILITY_CONTROL(0x2)
113 #define HSW_WB_LLC_AGE0 HSW_CACHEABILITY_CONTROL(0x3)
114 #define HSW_WB_ELLC_LLC_AGE3 HSW_CACHEABILITY_CONTROL(0x8)
115 #define HSW_WB_ELLC_LLC_AGE0 HSW_CACHEABILITY_CONTROL(0xb)
116 #define HSW_WT_ELLC_LLC_AGE3 HSW_CACHEABILITY_CONTROL(0x7)
117 #define HSW_WT_ELLC_LLC_AGE0 HSW_CACHEABILITY_CONTROL(0x6)

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