Searched refs:HIFN_1_DMA_CSR (Results 1 - 2 of 2) sorted by relevance
| /kernel/linux/linux-5.10/drivers/crypto/ |
| H A D | hifn_795x.c | 174 #define HIFN_1_DMA_CSR 0x40 /* DMA Status and Control */ macro
197 /* DMA Status and Control Register (HIFN_1_DMA_CSR) */
674 hifn_write_1(dev, HIFN_1_DMA_CSR, in hifn_stop_device()
994 hifn_write_1(dev, HIFN_1_DMA_CSR, in hifn_init_registers()
1008 hifn_write_1(dev, HIFN_1_DMA_CSR, in hifn_init_registers()
1022 hifn_read_1(dev, HIFN_1_DMA_CSR); in hifn_init_registers()
1222 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_C_CTRL_ENA); in hifn_setup_cmd_desc()
1258 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA); in hifn_setup_src_desc()
1285 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA); in hifn_setup_res_desc()
1315 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_EN in hifn_setup_dst_desc()
[all...] |
| /kernel/linux/linux-6.6/drivers/crypto/ |
| H A D | hifn_795x.c | 174 #define HIFN_1_DMA_CSR 0x40 /* DMA Status and Control */ macro
197 /* DMA Status and Control Register (HIFN_1_DMA_CSR) */
674 hifn_write_1(dev, HIFN_1_DMA_CSR, in hifn_stop_device()
994 hifn_write_1(dev, HIFN_1_DMA_CSR, in hifn_init_registers()
1008 hifn_write_1(dev, HIFN_1_DMA_CSR, in hifn_init_registers()
1022 hifn_read_1(dev, HIFN_1_DMA_CSR); in hifn_init_registers()
1222 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_C_CTRL_ENA); in hifn_setup_cmd_desc()
1258 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA); in hifn_setup_src_desc()
1285 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA); in hifn_setup_res_desc()
1315 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_EN in hifn_setup_dst_desc()
[all...] |
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