| /kernel/linux/linux-5.10/arch/arm/mach-clps711x/ |
| H A D | board-dt.c | 22 # define HALT (0x0800) macro
42 DEFINE_RES_MEM(CLPS711X_PHYS_BASE + HALT, SZ_128);
|
| /kernel/linux/linux-6.6/arch/arm/mach-clps711x/ |
| H A D | board-dt.c | 22 # define HALT (0x0800) macro
42 DEFINE_RES_MEM(CLPS711X_PHYS_BASE + HALT, SZ_128);
|
| /kernel/linux/linux-5.10/arch/mips/dec/ |
| H A D | int-handler.S | 236 FEXPORT(cpu_all_int) # HALT, timers, software junk
|
| /kernel/linux/linux-6.6/arch/mips/dec/ |
| H A D | int-handler.S | 236 FEXPORT(cpu_all_int) # HALT, timers, software junk
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | sdma_v2_4.c | 393 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 0); in sdma_v2_4_enable()
395 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 1); in sdma_v2_4_enable()
972 tmp = REG_SET_FIELD(tmp, SDMA0_F32_CNTL, HALT, 0); in sdma_v2_4_soft_reset()
979 tmp = REG_SET_FIELD(tmp, SDMA0_F32_CNTL, HALT, 0); in sdma_v2_4_soft_reset()
|
| H A D | sdma_v5_2.c | 567 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1); in sdma_v5_2_enable()
700 temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0); in sdma_v5_2_gfx_resume()
|
| H A D | sdma_v5_0.c | 636 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1); in sdma_v5_0_enable()
769 temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0); in sdma_v5_0_gfx_resume()
|
| H A D | sdma_v3_0.c | 628 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 0); in sdma_v3_0_enable()
630 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 1); in sdma_v3_0_enable()
|
| H A D | sdma_v4_0.c | 1108 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1); in sdma_v4_0_enable()
1480 temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0); in sdma_v4_0_start()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | sdma_v2_4.c | 387 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 0); in sdma_v2_4_enable()
389 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 1); in sdma_v2_4_enable()
963 tmp = REG_SET_FIELD(tmp, SDMA0_F32_CNTL, HALT, 0); in sdma_v2_4_soft_reset()
970 tmp = REG_SET_FIELD(tmp, SDMA0_F32_CNTL, HALT, 0); in sdma_v2_4_soft_reset()
|
| H A D | sdma_v3_0.c | 622 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 0); in sdma_v3_0_enable()
624 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 1); in sdma_v3_0_enable()
|
| H A D | sdma_v4_4_2.c | 586 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA_F32_CNTL, HALT, enable ? 0 : 1); in sdma_v4_4_2_inst_enable()
908 temp = REG_SET_FIELD(temp, SDMA_F32_CNTL, HALT, 0); in sdma_v4_4_2_inst_start()
|
| H A D | sdma_v5_0.c | 667 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1); in sdma_v5_0_enable()
804 temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0); in sdma_v5_0_gfx_resume()
|
| H A D | sdma_v5_2.c | 469 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1); in sdma_v5_2_enable()
604 temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0); in sdma_v5_2_gfx_resume()
|
| H A D | sdma_v6_0.c | 454 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1); in sdma_v6_0_enable()
574 temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0); in sdma_v6_0_gfx_resume()
|
| H A D | sdma_v4_0.c | 1012 f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1); in sdma_v4_0_enable()
1375 temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0); in sdma_v4_0_start()
|
| /kernel/linux/linux-5.10/arch/arc/kernel/ |
| H A D | entry-compact.S | 373 ; If this does happen we simply HALT as it means a BUG !!!
|
| /kernel/linux/linux-6.6/arch/arc/kernel/ |
| H A D | entry-compact.S | 358 ; If this does happen we simply HALT as it means a BUG !!!
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdkfd/ |
| H A D | cwsr_trap_handler_gfx9.asm | 188 // Second-level trap already handled exception if STATUS.HALT=1.
215 // If STATUS.HALT is set then this fault must come from SQC instruction fetch.
229 // If the PC points to S_ENDPGM then context save will fail if STATUS.HALT is set.
|
| H A D | cwsr_trap_handler_gfx10.asm | 190 // Second-level trap already handled exception if STATUS.HALT=1.
|
| /kernel/linux/linux-5.10/drivers/dma/ |
| H A D | hisi_dma.c | 50 HALT, enumerator
|
| /kernel/linux/linux-6.6/drivers/dma/ |
| H A D | hisi_dma.c | 106 HALT, enumerator
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/ |
| H A D | cwsr_trap_handler_gfx9.asm | 312 // If the PC points to S_ENDPGM then context save will fail if STATUS.HALT is set.
|
| H A D | cwsr_trap_handler_gfx10.asm | 305 // If the PC points to S_ENDPGM then context save will fail if STATUS.HALT is set.
|