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Searched refs:GPIO_LVL (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpio/
H A Dgpio-ich.c25 * the code would access offset ichx_regs[2(=GPIO_LVL)][1(=50/32)],
31 GPIO_LVL, enumerator
81 * Some chipsets don't let reading output values on GPIO_LVL register
112 if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) in ichx_write_bit()
124 if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) in ichx_write_bit()
147 if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) in ichx_read_bit()
185 ichx_write_bit(GPIO_LVL, nr, val, 0); in ichx_gpio_direction_output()
196 return ichx_read_bit(GPIO_LVL, nr); in ichx_gpio_get()
259 ichx_write_bit(GPIO_LVL, nr, val, 0); in ichx_gpio_set()
/kernel/linux/linux-6.6/drivers/gpio/
H A Dgpio-ich.c23 * the code would access offset ichx_regs[2(=GPIO_LVL)][1(=50/32)],
29 GPIO_LVL, enumerator
79 * Some chipsets don't let reading output values on GPIO_LVL register
110 if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) in ichx_write_bit()
122 if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) in ichx_write_bit()
145 if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) in ichx_read_bit()
183 ichx_write_bit(GPIO_LVL, nr, val, 0); in ichx_gpio_direction_output()
194 return ichx_read_bit(GPIO_LVL, nr); in ichx_gpio_get()
257 ichx_write_bit(GPIO_LVL, nr, val, 0); in ichx_gpio_set()

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