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Searched refs:GPDR (Results 1 - 25 of 29) sorted by relevance

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/kernel/linux/linux-5.10/arch/arm/mach-sa1100/
H A Dbadge4.c184 GPDR &= ~BADGE4_GPIO_INT_VID; in badge4_init()
185 GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 | in badge4_init()
194 GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL); in badge4_init()
198 GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2); in badge4_init()
202 GPDR |= BADGE4_GPIO_MUXSEL0; in badge4_init()
205 GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6); in badge4_init()
207 GPDR |= BADGE4_GPIO_TESTPT_J7; in badge4_init()
211 GPDR |= BADGE4_GPIO_PCMEN5V; in badge4_init()
214 //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0); in badge4_init()
221 //GPDR | in badge4_init()
[all...]
H A Dassabet.c158 GPDR &= ~SDA; in adv7171_send()
166 GPDR |= SDA; in adv7171_send()
172 unsigned gpdr = GPDR; in adv7171_write()
179 GPDR = (GPDR | SCK | MOD) & ~SDA; in adv7171_write()
183 GPDR |= SDA; in adv7171_write()
194 GPDR = gpdr; in adv7171_write()
550 GPDR |= GPIO_GPIO16; in assabet_init()
559 GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; in assabet_init()
567 GPDR | in assabet_init()
[all...]
H A Dpleb.c120 GPDR |= GPIO_UART_TXD; in pleb_map_io()
121 GPDR &= ~GPIO_UART_RXD; in pleb_map_io()
132 GPDR |= GPIO_ETH0_EN; /* set to output */ in pleb_map_io()
135 GPDR &= ~GPIO_ETH0_IRQ; in pleb_map_io()
H A Dpm.c62 SAVE(GPDR); in sa11x0_pm_enter()
96 RESTORE(GPDR); in sa11x0_pm_enter()
H A Dgeneric.c441 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; in sa1110_mb_disable()
460 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; in sa1110_mb_enable()
H A Dlart.c161 GPDR |= GPIO_UART_TXD; in lart_map_io()
162 GPDR &= ~GPIO_UART_RXD; in lart_map_io()
H A Dclock.c33 GPDR |= GPIO_32_768kHz; in clk_gpio27_enable()
44 GPDR &= ~GPIO_32_768kHz; in clk_gpio27_disable()
H A Dpci-nanoengine.c169 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; in pci_nanoengine_setup()
H A Dshannon.c139 GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET; in shannon_map_io()
140 GPDR &= ~GPIO_UART_RXD; in shannon_map_io()
H A Dsimpad.c216 GPDR |= GPIO_UART_TXD | GPIO_LDD13 | GPIO_LDD15; in simpad_map_io()
217 GPDR &= ~GPIO_UART_RXD; in simpad_map_io()
H A Dh3xxx.c286 GPDR = 0; /* Configure all GPIOs as input */ in h3xxx_map_io()
H A Djornada720.c265 GPDR |= GPIO_GPIO20; /* Clear gpio20 pin as input */ in jornada720_init()
H A Dcollie.c372 GPDR = GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 | in collie_init()
/kernel/linux/linux-6.6/arch/arm/mach-sa1100/
H A Dassabet.c156 GPDR &= ~SDA; in adv7171_send()
164 GPDR |= SDA; in adv7171_send()
170 unsigned gpdr = GPDR; in adv7171_write()
177 GPDR = (GPDR | SCK | MOD) & ~SDA; in adv7171_write()
181 GPDR |= SDA; in adv7171_write()
192 GPDR = gpdr; in adv7171_write()
523 GPDR |= GPIO_GPIO16; in assabet_init()
532 GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; in assabet_init()
540 GPDR | in assabet_init()
[all...]
H A Dpm.c64 SAVE(GPDR); in sa11x0_pm_enter()
98 RESTORE(GPDR); in sa11x0_pm_enter()
H A Dgeneric.c422 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; in sa1110_mb_disable()
441 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; in sa1110_mb_enable()
H A Dclock.c33 GPDR |= GPIO_32_768kHz; in clk_gpio27_enable()
44 GPDR &= ~GPIO_32_768kHz; in clk_gpio27_disable()
H A Dh3xxx.c286 GPDR = 0; /* Configure all GPIOs as input */ in h3xxx_map_io()
H A Djornada720.c265 GPDR |= GPIO_GPIO20; /* Clear gpio20 pin as input */ in jornada720_init()
H A Dcollie.c354 GPDR = GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 | in collie_init()
/kernel/linux/linux-5.10/arch/arm/mach-pxa/
H A Dmfp-pxa2xx.c32 #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c) macro
74 GPDR(gpio) |= mask; in __mfp_config_gpio()
76 GPDR(gpio) &= ~mask; in __mfp_config_gpio()
358 (GPDR(i) & GPIO_bit(i))) { in pxa2xx_mfp_suspend()
369 saved_gpdr[i] = GPDR(i * 32); in pxa2xx_mfp_suspend()
377 /* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */ in pxa2xx_mfp_suspend()
382 GPDR(i) |= GPIO_bit(i); in pxa2xx_mfp_suspend()
384 GPDR(i) &= ~GPIO_bit(i); in pxa2xx_mfp_suspend()
399 GPDR(i * 32) = saved_gpdr[i]; in pxa2xx_mfp_resume()
432 gpdr_lpm[i] = GPDR( in pxa2xx_mfp_init()
[all...]
/kernel/linux/linux-6.6/arch/arm/mach-pxa/
H A Dmfp-pxa2xx.c34 #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c) macro
76 GPDR(gpio) |= mask; in __mfp_config_gpio()
78 GPDR(gpio) &= ~mask; in __mfp_config_gpio()
356 (GPDR(i) & GPIO_bit(i))) { in pxa2xx_mfp_suspend()
367 saved_gpdr[i] = GPDR(i * 32); in pxa2xx_mfp_suspend()
375 /* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */ in pxa2xx_mfp_suspend()
380 GPDR(i) |= GPIO_bit(i); in pxa2xx_mfp_suspend()
382 GPDR(i) &= ~GPIO_bit(i); in pxa2xx_mfp_suspend()
397 GPDR(i * 32) = saved_gpdr[i]; in pxa2xx_mfp_resume()
430 gpdr_lpm[i] = GPDR( in pxa2xx_mfp_init()
[all...]
/kernel/linux/linux-6.6/drivers/gpio/
H A Dgpio-tangier.c32 #define GPDR 0x01c /* Pin direction */ macro
115 gpdr = gpio_reg_and_bit(chip, offset, GPDR, &shift); in tng_gpio_direction_input()
136 gpdr = gpio_reg_and_bit(chip, offset, GPDR, &shift); in tng_gpio_direction_output()
155 gpdr = gpio_reg_and_bit(chip, offset, GPDR, &shift); in tng_gpio_get_direction()
493 ctx->gpdr = readl(gpio_reg(&priv->chip, base, GPDR)); in tng_gpio_suspend()
520 writel(ctx->gpdr, gpio_reg(&priv->chip, base, GPDR)); in tng_gpio_resume()
/kernel/linux/linux-5.10/drivers/gpio/
H A Dgpio-merrifield.c20 #define GPDR 0x01c /* pin direction */ macro
126 void __iomem *gpdr = gpio_reg(chip, offset, GPDR); in mrfld_gpio_direction_input()
145 void __iomem *gpdr = gpio_reg(chip, offset, GPDR); in mrfld_gpio_direction_output()
163 void __iomem *gpdr = gpio_reg(chip, offset, GPDR); in mrfld_gpio_get_direction()
H A Dgpio-intel-mid.c33 * structure, to get a bit offset for a pin (use GPDR as an example):
38 * reg_addr = reg_base + GPDR * nreg * 4 + reg * 4;
40 * so the bit of reg_addr is to control pin offset's GPDR feature
45 GPDR, /* pin direction */ enumerator
123 void __iomem *gpdr = gpio_reg(chip, offset, GPDR); in intel_gpio_direction_input()
146 void __iomem *gpdr = gpio_reg(chip, offset, GPDR); in intel_gpio_direction_output()

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