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Searched refs:GICR_ISENABLER0 (Results 1 - 7 of 7) sorted by relevance

/kernel/linux/linux-6.6/tools/testing/selftests/kvm/include/aarch64/
H A Dgic_v3.h54 #define GICR_ISENABLER0 GICD_ISENABLER macro
/kernel/liteos_a/arch/arm/gic/
H A Dgic_v3.c279 GIC_REG_32(GICR_ISENABLER0(i)) = mask; in HalIrqUnmask()
337 GIC_REG_32(GICR_ISENABLER0(cpu)) = 0xffffffff; in HalIrqInitPercpu()
/kernel/liteos_a/arch/arm/include/
H A Dgic_v3.h94 #define GICR_ISENABLER0(i) (GICR_SGI_OFFSET + GICR_STRIDE * (i) + 0x0100) macro
/kernel/linux/linux-5.10/include/linux/irqchip/
H A Darm-gic-v3.h229 #define GICR_ISENABLER0 GICD_ISENABLER macro
/kernel/linux/linux-6.6/include/linux/irqchip/
H A Darm-gic-v3.h231 #define GICR_ISENABLER0 GICD_ISENABLER macro
/kernel/linux/linux-5.10/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c640 REGISTER_DESC_WITH_LENGTH_UACCESS(SZ_64K + GICR_ISENABLER0,
/kernel/linux/linux-6.6/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c714 REGISTER_DESC_WITH_LENGTH_UACCESS(SZ_64K + GICR_ISENABLER0,

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