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Searched refs:GICD_ITARGETSR (Results 1 - 6 of 6) sorted by relevance

/kernel/liteos_a/arch/arm/gic/
H A Dgic_v2.c68 GIC_REG_8(GICD_ITARGETSR(offset) + index) = cpuMask; in HalIrqSetAffinity()
129 GIC_REG_32(GICD_ITARGETSR(i / 4)) = 0x01010101; in HalIrqInit()
/kernel/liteos_a/arch/arm/include/
H A Dgic_common.h71 #define GICD_ITARGETSR(n) (GICD_OFFSET + 0x800 + (n) * 4) /* Interrupt Processor Targets Registers */ macro
/kernel/linux/linux-5.10/include/linux/irqchip/
H A Darm-gic-v3.h53 #define GICD_ITARGETSR 0x0800 macro
/kernel/linux/linux-6.6/include/linux/irqchip/
H A Darm-gic-v3.h53 #define GICD_ITARGETSR 0x0800 macro
/kernel/linux/linux-5.10/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c592 REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ITARGETSR,
/kernel/linux/linux-6.6/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c657 REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ITARGETSR,

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