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Searched refs:GATE_TOP3 (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A Dclk-mt8167.c739 #define GATE_TOP3(_id, _name, _parent, _shift) \ macro
822 GATE_TOP3(CLK_TOP_RG_SPINOR, "rg_spinor", "spinor_sel", 0),
823 GATE_TOP3(CLK_TOP_RG_MSDC2, "rg_msdc2", "msdc2_sel", 1),
824 GATE_TOP3(CLK_TOP_RG_ETH, "rg_eth", "eth_sel", 2),
825 GATE_TOP3(CLK_TOP_RG_VDEC, "rg_vdec", "vdec_mm_sel", 3),
826 GATE_TOP3(CLK_TOP_RG_FDPI0, "rg_fdpi0", "dpi0_mm_sel", 4),
827 GATE_TOP3(CLK_TOP_RG_FDPI1, "rg_fdpi1", "dpi1_mm_sel", 5),
828 GATE_TOP3(CLK_TOP_RG_AXI_MFG, "rg_axi_mfg", "axi_mfg_in_sel", 6),
829 GATE_TOP3(CLK_TOP_RG_SLOW_MFG, "rg_slow_mfg", "slow_mfg_sel", 7),
830 GATE_TOP3(CLK_TOP_RG_AUD
[all...]
H A Dclk-mt8516.c538 #define GATE_TOP3(_id, _name, _parent, _shift) \ macro
609 GATE_TOP3(CLK_TOP_RG_SPINOR, "rg_spinor", "spinor_sel", 0),
610 GATE_TOP3(CLK_TOP_RG_MSDC2, "rg_msdc2", "msdc2_sel", 1),
611 GATE_TOP3(CLK_TOP_RG_ETH, "rg_eth", "eth_sel", 2),
612 GATE_TOP3(CLK_TOP_RG_AUD1, "rg_aud1", "aud1_sel", 8),
613 GATE_TOP3(CLK_TOP_RG_AUD2, "rg_aud2", "aud2_sel", 9),
614 GATE_TOP3(CLK_TOP_RG_AUD_ENGEN1, "rg_aud_engen1", "aud_engen1_sel", 10),
615 GATE_TOP3(CLK_TOP_RG_AUD_ENGEN2, "rg_aud_engen2", "aud_engen2_sel", 11),
616 GATE_TOP3(CLK_TOP_RG_I2C, "rg_i2c", "i2c_sel", 12),
617 GATE_TOP3(CLK_TOP_RG_PWM_INFR
[all...]
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A Dclk-mt8167.c783 #define GATE_TOP3(_id, _name, _parent, _shift) { \ macro
884 GATE_TOP3(CLK_TOP_RG_SPINOR, "rg_spinor", "spinor_sel", 0),
885 GATE_TOP3(CLK_TOP_RG_MSDC2, "rg_msdc2", "msdc2_sel", 1),
886 GATE_TOP3(CLK_TOP_RG_ETH, "rg_eth", "eth_sel", 2),
887 GATE_TOP3(CLK_TOP_RG_VDEC, "rg_vdec", "vdec_mm_sel", 3),
888 GATE_TOP3(CLK_TOP_RG_FDPI0, "rg_fdpi0", "dpi0_mm_sel", 4),
889 GATE_TOP3(CLK_TOP_RG_FDPI1, "rg_fdpi1", "dpi1_mm_sel", 5),
890 GATE_TOP3(CLK_TOP_RG_AXI_MFG, "rg_axi_mfg", "axi_mfg_in_sel", 6),
891 GATE_TOP3(CLK_TOP_RG_SLOW_MFG, "rg_slow_mfg", "slow_mfg_sel", 7),
892 GATE_TOP3(CLK_TOP_RG_AUD
[all...]
H A Dclk-mt8516.c554 #define GATE_TOP3(_id, _name, _parent, _shift) { \ macro
643 GATE_TOP3(CLK_TOP_RG_SPINOR, "rg_spinor", "spinor_sel", 0),
644 GATE_TOP3(CLK_TOP_RG_MSDC2, "rg_msdc2", "msdc2_sel", 1),
645 GATE_TOP3(CLK_TOP_RG_ETH, "rg_eth", "eth_sel", 2),
646 GATE_TOP3(CLK_TOP_RG_AUD1, "rg_aud1", "aud1_sel", 8),
647 GATE_TOP3(CLK_TOP_RG_AUD2, "rg_aud2", "aud2_sel", 9),
648 GATE_TOP3(CLK_TOP_RG_AUD_ENGEN1, "rg_aud_engen1", "aud_engen1_sel", 10),
649 GATE_TOP3(CLK_TOP_RG_AUD_ENGEN2, "rg_aud_engen2", "aud_engen2_sel", 11),
650 GATE_TOP3(CLK_TOP_RG_I2C, "rg_i2c", "i2c_sel", 12),
651 GATE_TOP3(CLK_TOP_RG_PWM_INFR
[all...]

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