GATE_IP_PERIL (reference) in projects: kernel - OpenGrok search results

Repository(s)

Full Search		Search through all text tokens(words,strings,identifiers,numbers) in index.
Definition		Only finds symbol definitions(where e.g a variable(function,...) is defined).
Symbol		Only finds symbol(e.g. methods classes,function,variables).
File Path		Path of the source file(use "/").If you want just exact path,enclose it in "".Source files end with: .jar/.bz2/.a/.h/.java...
History		History log comments.
Type		Type of analyzer used to filter file types include with selected(e.g. just C sources).

Help

Searched refs:GATE_IP_PERIL (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/samsung/
H A D	clk-exynos4.c	99 #define GATE_IP_PERIL 0xc950 macro 240 GATE_IP_PERIL, 736 GATE(CLK_SLIMBUS, "slimbus", "aclk100", GATE_IP_PERIL, 25, 0, 0), 750 GATE(CLK_PWM, "pwm", "aclk100", GATE_IP_PERIL, 24, 0, 0), 848 GATE(CLK_UART0, "uart0", "aclk100", GATE_IP_PERIL, 0, 850 GATE(CLK_UART1, "uart1", "aclk100", GATE_IP_PERIL, 1, 852 GATE(CLK_UART2, "uart2", "aclk100", GATE_IP_PERIL, 2, 854 GATE(CLK_UART3, "uart3", "aclk100", GATE_IP_PERIL, 3, 856 GATE(CLK_UART4, "uart4", "aclk100", GATE_IP_PERIL, 4, 858 GATE(CLK_I2C0, "i2c0", "aclk100", GATE_IP_PERIL, [all...]
H A D	clk-exynos3250.c	79 #define GATE_IP_PERIL 0xc950 macro 163 GATE_IP_PERIL, 649 /* GATE_IP_PERIL */ 650 GATE(CLK_PWM, "pwm", "div_aclk_100", GATE_IP_PERIL, 24, 0, 0), 651 GATE(CLK_PCM, "pcm", "div_aclk_100", GATE_IP_PERIL, 23, 0, 0), 652 GATE(CLK_I2S, "i2s", "div_aclk_100", GATE_IP_PERIL, 21, 0, 0), 653 GATE(CLK_SPI1, "spi1", "div_aclk_100", GATE_IP_PERIL, 17, 0, 0), 654 GATE(CLK_SPI0, "spi0", "div_aclk_100", GATE_IP_PERIL, 16, 0, 0), 655 GATE(CLK_I2C7, "i2c7", "div_aclk_100", GATE_IP_PERIL, 13, 0, 0), 656 GATE(CLK_I2C6, "i2c6", "div_aclk_100", GATE_IP_PERIL, 1 [all...]
/kernel/linux/linux-6.6/drivers/clk/samsung/
H A D	clk-exynos4.c	99 #define GATE_IP_PERIL 0xc950 macro 244 GATE_IP_PERIL, 740 GATE(CLK_SLIMBUS, "slimbus", "aclk100", GATE_IP_PERIL, 25, 0, 0), 754 GATE(CLK_PWM, "pwm", "aclk100", GATE_IP_PERIL, 24, 0, 0), 852 GATE(CLK_UART0, "uart0", "aclk100", GATE_IP_PERIL, 0, 854 GATE(CLK_UART1, "uart1", "aclk100", GATE_IP_PERIL, 1, 856 GATE(CLK_UART2, "uart2", "aclk100", GATE_IP_PERIL, 2, 858 GATE(CLK_UART3, "uart3", "aclk100", GATE_IP_PERIL, 3, 860 GATE(CLK_UART4, "uart4", "aclk100", GATE_IP_PERIL, 4, 862 GATE(CLK_I2C0, "i2c0", "aclk100", GATE_IP_PERIL, [all...]
H A D	clk-exynos3250.c	79 #define GATE_IP_PERIL 0xc950 macro 168 GATE_IP_PERIL, 654 /* GATE_IP_PERIL */ 655 GATE(CLK_PWM, "pwm", "div_aclk_100", GATE_IP_PERIL, 24, 0, 0), 656 GATE(CLK_PCM, "pcm", "div_aclk_100", GATE_IP_PERIL, 23, 0, 0), 657 GATE(CLK_I2S, "i2s", "div_aclk_100", GATE_IP_PERIL, 21, 0, 0), 658 GATE(CLK_SPI1, "spi1", "div_aclk_100", GATE_IP_PERIL, 17, 0, 0), 659 GATE(CLK_SPI0, "spi0", "div_aclk_100", GATE_IP_PERIL, 16, 0, 0), 660 GATE(CLK_I2C7, "i2c7", "div_aclk_100", GATE_IP_PERIL, 13, 0, 0), 661 GATE(CLK_I2C6, "i2c6", "div_aclk_100", GATE_IP_PERIL, 1 [all...]

Completed in 6 milliseconds