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Searched refs:G1_REG_REF_PIC (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/staging/media/hantro/
H A Dhantro_g1_vp8_dec.c33 { G1_REG_REF_PIC(2), 18, 0x3f },
34 { G1_REG_REF_PIC(2), 12, 0x3f },
35 { G1_REG_REF_PIC(2), 6, 0x3f },
36 { G1_REG_REF_PIC(2), 0, 0x3f },
41 { G1_REG_REF_PIC(0), 21, 0x7f },
42 { G1_REG_REF_PIC(0), 14, 0x7f },
43 { G1_REG_REF_PIC(0), 7, 0x7f },
44 { G1_REG_REF_PIC(0), 0, 0x7f },
49 { G1_REG_REF_PIC(1), 21, 0x7f },
50 { G1_REG_REF_PIC(
[all...]
H A Dhantro_g1_h264_dec.c156 * Each G1_REG_REF_PIC(x) register contains numbers of two in set_ref()
171 vdpu_write_relaxed(vpu, reg, G1_REG_REF_PIC(i / 2)); in set_ref()
H A Dhantro_g1_regs.h236 #define G1_REG_REF_PIC(i) (0x078 + ((i) * 0x4)) macro
/kernel/linux/linux-6.6/drivers/media/platform/verisilicon/
H A Dhantro_g1_vp8_dec.c32 { G1_REG_REF_PIC(2), 18, 0x3f },
33 { G1_REG_REF_PIC(2), 12, 0x3f },
34 { G1_REG_REF_PIC(2), 6, 0x3f },
35 { G1_REG_REF_PIC(2), 0, 0x3f },
40 { G1_REG_REF_PIC(0), 21, 0x7f },
41 { G1_REG_REF_PIC(0), 14, 0x7f },
42 { G1_REG_REF_PIC(0), 7, 0x7f },
43 { G1_REG_REF_PIC(0), 0, 0x7f },
48 { G1_REG_REF_PIC(1), 21, 0x7f },
49 { G1_REG_REF_PIC(
[all...]
H A Dhantro_g1_h264_dec.c141 * Each G1_REG_REF_PIC(x) register contains numbers of two in set_ref()
147 vdpu_write_relaxed(vpu, reg, G1_REG_REF_PIC(i / 2)); in set_ref()
H A Dhantro_g1_regs.h238 #define G1_REG_REF_PIC(i) (0x078 + ((i) * 0x4)) macro

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