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Searched refs:G1_REG_CONFIG_DEC_CLK_GATE_E (Results 1 - 11 of 11) sorted by relevance

/kernel/linux/linux-6.6/drivers/media/platform/verisilicon/
H A Dhantro_g1.c25 vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); in hantro_g1_irq()
37 vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); in hantro_g1_reset()
H A Dimx8m_vpu_hw.c248 vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); in imx8m_vpu_g1_irq()
H A Dhantro_g1_h264_dec.c279 G1_REG_CONFIG_DEC_CLK_GATE_E, in hantro_g1_h264_dec_run()
H A Dhantro_g1_vp8_dec.c460 G1_REG_CONFIG_DEC_CLK_GATE_E | in hantro_g1_vp8_dec_run()
H A Dhantro_g1_regs.h38 #define G1_REG_CONFIG_DEC_CLK_GATE_E BIT(10) macro
H A Drockchip_vpu_hw.c463 vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); in rk3066_vpu_dec_reset()
/kernel/linux/linux-5.10/drivers/staging/media/hantro/
H A Drk3288_vpu_hw.c141 vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); in rk3288_vdpu_irq()
169 vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); in rk3288_vpu_dec_reset()
H A Dimx8m_vpu_hw.c144 vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); in imx8m_vpu_g1_irq()
H A Dhantro_g1_h264_dec.c301 G1_REG_CONFIG_DEC_CLK_GATE_E, in hantro_g1_h264_dec_run()
H A Dhantro_g1_vp8_dec.c463 G1_REG_CONFIG_DEC_CLK_GATE_E | in hantro_g1_vp8_dec_run()
H A Dhantro_g1_regs.h38 #define G1_REG_CONFIG_DEC_CLK_GATE_E BIT(10) macro

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