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Help
Searched
refs:EXP_TIMING_CS0
(Results
1 - 2
of
2
) sorted by relevance
/kernel/linux/linux-5.10/drivers/mtd/maps/
H
A
D
intel_vr_nor.c
14
* and Control Register for Chip Select 0 (
EXP_TIMING_CS0
). This driver does
15
* not modify the value in the
EXP_TIMING_CS0
register except to enable writing
58
#define
EXP_TIMING_CS0
0x00
macro
103
exp_timing_cs0 = readl(p->csr_base +
EXP_TIMING_CS0
);
in vr_nor_destroy_maps()
105
writel(exp_timing_cs0, p->csr_base +
EXP_TIMING_CS0
);
in vr_nor_destroy_maps()
140
exp_timing_cs0 = readl(p->csr_base +
EXP_TIMING_CS0
);
in vr_nor_init_maps()
164
writel(exp_timing_cs0, p->csr_base +
EXP_TIMING_CS0
);
in vr_nor_init_maps()
232
exp_timing_cs0 = readl(p->csr_base +
EXP_TIMING_CS0
);
in vr_nor_pci_probe()
234
writel(exp_timing_cs0, p->csr_base +
EXP_TIMING_CS0
);
in vr_nor_pci_probe()
/kernel/linux/linux-6.6/drivers/mtd/maps/
H
A
D
intel_vr_nor.c
14
* and Control Register for Chip Select 0 (
EXP_TIMING_CS0
). This driver does
15
* not modify the value in the
EXP_TIMING_CS0
register except to enable writing
58
#define
EXP_TIMING_CS0
0x00
macro
103
exp_timing_cs0 = readl(p->csr_base +
EXP_TIMING_CS0
);
in vr_nor_destroy_maps()
105
writel(exp_timing_cs0, p->csr_base +
EXP_TIMING_CS0
);
in vr_nor_destroy_maps()
140
exp_timing_cs0 = readl(p->csr_base +
EXP_TIMING_CS0
);
in vr_nor_init_maps()
164
writel(exp_timing_cs0, p->csr_base +
EXP_TIMING_CS0
);
in vr_nor_init_maps()
232
exp_timing_cs0 = readl(p->csr_base +
EXP_TIMING_CS0
);
in vr_nor_pci_probe()
234
writel(exp_timing_cs0, p->csr_base +
EXP_TIMING_CS0
);
in vr_nor_pci_probe()
Completed in 2 milliseconds