Searched refs:EXCCODE_TLBL (Results 1 - 16 of 16) sorted by relevance
| /kernel/linux/linux-5.10/arch/loongarch/mm/ |
| H A D | tlb.c | 274 exception_table[EXCCODE_TLBL] = handle_tlb_load_ptw; in setup_tlb_handler()
284 for (i = EXCCODE_TLBL; i <= EXCCODE_TLBPE; i++) in setup_tlb_handler()
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| /kernel/linux/linux-6.6/arch/loongarch/mm/ |
| H A D | tlb.c | 275 set_handler(EXCCODE_TLBL * VECSIZE, handle_tlb_load, VECSIZE); in setup_tlb_handler()
280 set_handler(EXCCODE_TLBL * VECSIZE, handle_tlb_load_ptw, VECSIZE); in setup_tlb_handler()
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| /kernel/linux/linux-5.10/arch/loongarch/kvm/ |
| H A D | trace.h | 57 #define KVM_TRACE_EXIT_TLBLD (EXCCODE_TLBL)
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| H A D | exit.c | 493 [EXCCODE_TLBL] = _kvm_handle_read_fault,
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| H A D | loongarch.c | 53 VCPU_STAT("tlbmiss_ld", excep_exits[EXCCODE_TLBL]),
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| /kernel/linux/linux-5.10/arch/loongarch/kernel/ |
| H A D | traps.c | 60 [EXCCODE_TLBL] = handle_tlb_load,
268 case EXCCODE_TLBL: return "PIL"; in humanize_exc_name()
378 if (exccode >= EXCCODE_TLBL && exccode <= EXCCODE_ALE) in __show_regs()
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| /kernel/linux/linux-5.10/arch/mips/kvm/ |
| H A D | emulate.c | 2452 (EXCCODE_TLBL << CAUSEB_EXCCODE)); in kvm_mips_emulate_tlbmiss_ld()
2493 (EXCCODE_TLBL << CAUSEB_EXCCODE)); in kvm_mips_emulate_tlbinv_ld()
3157 case EXCCODE_TLBL: in kvm_mips_check_privilege()
3199 cause |= (EXCCODE_TLBL << CAUSEB_EXCCODE); in kvm_mips_check_privilege()
3246 if (exccode == EXCCODE_TLBL) { in kvm_mips_handle_tlbmiss()
3263 if (exccode == EXCCODE_TLBL) { in kvm_mips_handle_tlbmiss()
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| H A D | mips.c | 1287 case EXCCODE_TLBL: in kvm_mips_handle_exit()
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| /kernel/linux/linux-6.6/arch/loongarch/kernel/ |
| H A D | traps.c | 236 case EXCCODE_TLBL: return "PIL"; in humanize_exc_name()
346 if (exccode >= EXCCODE_TLBL && exccode <= EXCCODE_ALE) in __show_regs()
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| /kernel/linux/linux-6.6/arch/mips/kvm/ |
| H A D | mips.c | 1236 case EXCCODE_TLBL: in __kvm_mips_handle_exit()
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| /kernel/linux/linux-6.6/arch/loongarch/include/asm/ |
| H A D | loongarch.h | 1309 #define EXCCODE_TLBL 1 /* TLB miss on a load */ macro
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| /kernel/linux/linux-5.10/arch/mips/include/asm/ |
| H A D | mipsregs.h | 456 #define EXCCODE_TLBL 2 /* TLB miss on load or ifetch */ macro
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| /kernel/linux/linux-5.10/arch/loongarch/include/asm/ |
| H A D | loongarchregs.h | 1532 #define EXCCODE_TLBL 1 /* TLB miss on a load */ macro
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| /kernel/linux/linux-5.10/arch/mips/kernel/ |
| H A D | traps.c | 2470 set_except_vector(EXCCODE_TLBL, handle_tlbl); in trap_init()
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| /kernel/linux/linux-6.6/arch/mips/include/asm/ |
| H A D | mipsregs.h | 441 #define EXCCODE_TLBL 2 /* TLB miss on load or ifetch */ macro
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| /kernel/linux/linux-6.6/arch/mips/kernel/ |
| H A D | traps.c | 2467 set_except_vector(EXCCODE_TLBL, handle_tlbl); in trap_init()
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