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Searched refs:ENGINE_WRITE (Results 1 - 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
H A Dintel_ring_submission.c140 ENGINE_WRITE(engine, RING_INSTPM, in flush_cs_tlb()
165 ENGINE_WRITE(engine, in stop_ring()
187 ENGINE_WRITE(engine, RING_HEAD, ENGINE_READ(engine, RING_TAIL)); in stop_ring()
189 ENGINE_WRITE(engine, RING_HEAD, 0); in stop_ring()
190 ENGINE_WRITE(engine, RING_TAIL, 0); in stop_ring()
193 ENGINE_WRITE(engine, RING_CTL, 0); in stop_ring()
216 ENGINE_WRITE(engine, RING_PP_DIR_DCLV, PP_DIR_DCLV_2G); in set_pp_dir()
217 ENGINE_WRITE(engine, RING_PP_DIR_BASE, pp_dir(vm)); in set_pp_dir()
273 ENGINE_WRITE(engine, RING_START, i915_ggtt_offset(ring->vma)); in xcs_resume()
283 ENGINE_WRITE(engin in xcs_resume()
[all...]
H A Dgen6_engine_cs.c426 ENGINE_WRITE(engine, RING_IMR, in gen6_irq_enable()
437 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask); in gen6_irq_disable()
443 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_enable_mask); in hsw_irq_enable_vecs()
453 ENGINE_WRITE(engine, RING_IMR, ~0); in hsw_irq_disable_vecs()
H A Dintel_gt_irq.c37 ENGINE_WRITE(engine, RING_EMR, ~0u); in cs_irq_handler()
38 ENGINE_WRITE(engine, RING_EIR, eir); in cs_irq_handler()
H A Dintel_engine.h76 #define ENGINE_WRITE(...) __ENGINE_WRITE_OP(write, __VA_ARGS__) macro
H A Dgen6_ppgtt.c47 ENGINE_WRITE(engine, in gen7_ppgtt_enable()
H A Dintel_lrc.c4027 ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR, in reset_csb_pointers()
4050 ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR, in reset_csb_pointers()
4089 ENGINE_WRITE(engine, RING_EMR, ~0u); in enable_error_interrupt()
4090 ENGINE_WRITE(engine, RING_EIR, ~0u); /* clear all existing errors */ in enable_error_interrupt()
4124 ENGINE_WRITE(engine, RING_EMR, ~I915_ERROR_INSTRUCTION); in enable_error_interrupt()
4523 ENGINE_WRITE(engine, RING_IMR, in gen8_logical_ring_enable_irq()
4530 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask); in gen8_logical_ring_disable_irq()
H A Dintel_engine_cs.c264 ENGINE_WRITE(engine, RING_HWSTAM, mask); in intel_engine_set_hwsp_writemask()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/
H A Dgen6_engine_cs.c427 ENGINE_WRITE(engine, RING_IMR, in gen6_irq_enable()
438 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask); in gen6_irq_disable()
444 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_enable_mask); in hsw_irq_enable_vecs()
454 ENGINE_WRITE(engine, RING_IMR, ~0); in hsw_irq_disable_vecs()
H A Dintel_execlists_submission.c2502 ENGINE_WRITE(engine, RING_EMR, ~0u); in execlists_irq_handler()
2503 ENGINE_WRITE(engine, RING_EIR, eir); in execlists_irq_handler()
2818 ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR, in reset_csb_pointers()
2842 ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR, in reset_csb_pointers()
2893 ENGINE_WRITE(engine, RING_EMR, ~0u); in enable_error_interrupt()
2894 ENGINE_WRITE(engine, RING_EIR, ~0u); /* clear all existing errors */ in enable_error_interrupt()
2928 ENGINE_WRITE(engine, RING_EMR, ~I915_ERROR_INSTRUCTION); in enable_error_interrupt()
3263 ENGINE_WRITE(engine, RING_IMR, in gen8_logical_ring_enable_irq()
3270 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask); in gen8_logical_ring_disable_irq()
H A Dintel_engine.h79 #define ENGINE_WRITE(...) __ENGINE_WRITE_OP(write, __VA_ARGS__) macro
H A Dintel_ring_submission.c445 ENGINE_WRITE(request->engine, RING_TAIL, in i9xx_submit_request()
H A Dintel_engine_cs.c381 ENGINE_WRITE(engine, RING_HWSTAM, mask); in intel_engine_set_hwsp_writemask()

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