ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (reference) in projects: kernel

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Searched refs:ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (Results 1 - 25 of 30) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A D	rv770d.h	`645 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`
H A D	ni.c	`1296 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in cayman_pcie_gart_enable() 1375 WREG32(VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in cayman_pcie_gart_disable()`
H A D	rv770.c	`911 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in rv770_pcie_gart_enable() 988 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in rv770_agp_enable()`
H A D	nid.h	`107 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`
H A D	cikd.h	`492 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`
H A D	sid.h	`374 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`
H A D	r600.c	`1144 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in r600_pcie_gart_enable() 1236 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in r600_agp_enable()`
H A D	evergreend.h	`1153 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`
H A D	r600d.h	`590 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`
H A D	evergreen.c	`2411 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in evergreen_pcie_gart_enable() 2494 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in evergreen_agp_enable()`
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A D	rv770d.h	`645 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`
H A D	rv770.c	`908 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in rv770_pcie_gart_enable() 985 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in rv770_agp_enable()`
H A D	ni.c	`1283 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in cayman_pcie_gart_enable() 1362 WREG32(VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in cayman_pcie_gart_disable()`
H A D	nid.h	`107 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`
H A D	cikd.h	`492 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`
H A D	sid.h	`374 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`
H A D	r600.c	`1143 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in r600_pcie_gart_enable() 1235 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| in r600_agp_enable()`
H A D	evergreend.h	`1153 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`
H A D	r600d.h	`590 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A D	gmc_v7_0.c	`636 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE, 1); in gmc_v7_0_gart_enable()`
H A D	gmc_v8_0.c	`869 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE, 1); in gmc_v8_0_gart_enable()`
H A D	sid.h	`375 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A D	gmc_v7_0.c	`630 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE, 1); in gmc_v7_0_gart_enable()`
H A D	gmc_v8_0.c	`845 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE, 1); in gmc_v8_0_gart_enable()`
H A D	sid.h	`375 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro`

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