Searched refs:EMC_TIMING_CONTROL (Results 1 - 12 of 12) sorted by relevance
| /kernel/linux/linux-5.10/drivers/memory/tegra/ |
| H A D | tegra20-emc.c | 27 #define EMC_TIMING_CONTROL 0x028 macro
235 emc->regs + EMC_TIMING_CONTROL); in emc_complete_timing_change()
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| H A D | tegra124-emc.c | 44 #define EMC_TIMING_CONTROL 0x28 macro
500 writel(1, emc->regs + EMC_TIMING_CONTROL); in emc_seq_update_timing()
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| H A D | tegra30-emc.c | 36 #define EMC_TIMING_CONTROL 0x028 macro
362 writel_relaxed(EMC_TIMING_UPDATE, emc->regs + EMC_TIMING_CONTROL); in emc_seq_update_timing()
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| H A D | tegra210-emc.h | 35 #define EMC_TIMING_CONTROL 0x28 macro
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| H A D | tegra210-emc-core.c | 907 emc_writel(emc, 0x1, EMC_TIMING_CONTROL); in tegra210_emc_timing_update()
1154 emc_writel(emc, 1, EMC_TIMING_CONTROL); in tegra210_emc_dll_prelock()
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| /kernel/linux/linux-5.10/arch/arm/mach-tegra/ |
| H A D | sleep-tegra30.S | 20 #define EMC_TIMING_CONTROL 0x28 define
83 str \rd, [\base, #EMC_TIMING_CONTROL]
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| /kernel/linux/linux-6.6/arch/arm/mach-tegra/ |
| H A D | sleep-tegra30.S | 20 #define EMC_TIMING_CONTROL 0x28 define
92 str \rd, [\base, #EMC_TIMING_CONTROL]
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| /kernel/linux/linux-6.6/drivers/memory/tegra/ |
| H A D | tegra20-emc.c | 40 #define EMC_TIMING_CONTROL 0x028 macro
309 emc->regs + EMC_TIMING_CONTROL); in emc_complete_timing_change()
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| H A D | tegra124-emc.c | 51 #define EMC_TIMING_CONTROL 0x28 macro
530 writel(1, emc->regs + EMC_TIMING_CONTROL); in emc_seq_update_timing()
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| H A D | tegra210-emc.h | 35 #define EMC_TIMING_CONTROL 0x28 macro
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| H A D | tegra30-emc.c | 46 #define EMC_TIMING_CONTROL 0x028 macro
403 writel_relaxed(EMC_TIMING_UPDATE, emc->regs + EMC_TIMING_CONTROL); in emc_seq_update_timing()
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| H A D | tegra210-emc-core.c | 907 emc_writel(emc, 0x1, EMC_TIMING_CONTROL); in tegra210_emc_timing_update()
1154 emc_writel(emc, 1, EMC_TIMING_CONTROL); in tegra210_emc_dll_prelock()
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