Searched refs:EMC_FBIO_CFG5 (Results 1 - 14 of 14) sorted by relevance
| /kernel/linux/linux-5.10/drivers/memory/tegra/ |
| H A D | tegra30-emc.c | 81 #define EMC_FBIO_CFG5 0x104 macro
260 [39] = EMC_FBIO_CFG5,
530 fbio_cfg5 = readl_relaxed(emc->regs + EMC_FBIO_CFG5); in emc_prepare_timing_change()
1013 fbio_cfg5 = readl_relaxed(emc->regs + EMC_FBIO_CFG5); in emc_setup_hw()
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| H A D | tegra210-emc-core.c | 162 EMC_FBIO_CFG5,
1314 EMC_FBIO_CFG5, (100000 / clk) + 10); in tegra210_emc_dvfs_power_ramp_up()
1320 EMC_FBIO_CFG5, (100000 / clk) + 10); in tegra210_emc_dvfs_power_ramp_up()
1326 EMC_FBIO_CFG5, 12); in tegra210_emc_dvfs_power_ramp_up()
1358 EMC_FBIO_CFG5, 12); in tegra210_emc_dvfs_power_ramp_down()
1790 value = emc_readl(emc, EMC_FBIO_CFG5); in tegra210_emc_detect()
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| H A D | tegra20-emc.c | 63 #define EMC_FBIO_CFG5 0x104 macro
128 EMC_FBIO_CFG5,
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| H A D | tegra124-emc.c | 25 #define EMC_FBIO_CFG5 0x104 macro
347 EMC_FBIO_CFG5,
871 emc->dram_type = readl(emc->regs + EMC_FBIO_CFG5); in emc_init()
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| H A D | tegra210-emc.h | 104 #define EMC_FBIO_CFG5 0x104 macro
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| H A D | tegra210-emc-cc-r21021.c | 630 value = emc_readl(emc, EMC_FBIO_CFG5) & EMC_FBIO_CFG5_DRAM_TYPE_MASK; in tegra210_emc_r21021_set_clock()
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| /kernel/linux/linux-6.6/drivers/memory/tegra/ |
| H A D | tegra210-emc-core.c | 162 EMC_FBIO_CFG5,
1314 EMC_FBIO_CFG5, (100000 / clk) + 10); in tegra210_emc_dvfs_power_ramp_up()
1320 EMC_FBIO_CFG5, (100000 / clk) + 10); in tegra210_emc_dvfs_power_ramp_up()
1326 EMC_FBIO_CFG5, 12); in tegra210_emc_dvfs_power_ramp_up()
1358 EMC_FBIO_CFG5, 12); in tegra210_emc_dvfs_power_ramp_down()
1773 value = emc_readl(emc, EMC_FBIO_CFG5); in tegra210_emc_detect()
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| H A D | tegra20-emc.c | 77 #define EMC_FBIO_CFG5 0x104 macro
168 EMC_FBIO_CFG5,
634 emc_fbio = readl_relaxed(emc->regs + EMC_FBIO_CFG5); in emc_setup_hw()
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| H A D | tegra124-emc.c | 31 #define EMC_FBIO_CFG5 0x104 macro
354 EMC_FBIO_CFG5,
901 emc->dram_type = readl(emc->regs + EMC_FBIO_CFG5); in emc_init()
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| H A D | tegra30-emc.c | 92 #define EMC_FBIO_CFG5 0x104 macro
278 [39] = EMC_FBIO_CFG5,
571 fbio_cfg5 = readl_relaxed(emc->regs + EMC_FBIO_CFG5); in emc_prepare_timing_change()
1127 fbio_cfg5 = readl_relaxed(emc->regs + EMC_FBIO_CFG5); in emc_setup_hw()
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| H A D | tegra210-emc.h | 104 #define EMC_FBIO_CFG5 0x104 macro
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| H A D | tegra210-emc-cc-r21021.c | 630 value = emc_readl(emc, EMC_FBIO_CFG5) & EMC_FBIO_CFG5_DRAM_TYPE_MASK; in tegra210_emc_r21021_set_clock()
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| /kernel/linux/linux-5.10/arch/arm/mach-tegra/ |
| H A D | sleep-tegra30.S | 24 #define EMC_FBIO_CFG5 0x104 define
478 ldr r2, [r0, #EMC_FBIO_CFG5]
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| /kernel/linux/linux-6.6/arch/arm/mach-tegra/ |
| H A D | sleep-tegra30.S | 24 #define EMC_FBIO_CFG5 0x104 define
523 ldr r2, [r0, #EMC_FBIO_CFG5]
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