D_BDW (reference) in projects: kernel - OpenGrok search results

Repository(s)

Full Search		Search through all text tokens(words,strings,identifiers,numbers) in index.
Definition		Only finds symbol definitions(where e.g a variable(function,...) is defined).
Symbol		Only finds symbol(e.g. methods classes,function,variables).
File Path		Path of the source file(use "/").If you want just exact path,enclose it in "".Source files end with: .jar/.bz2/.a/.h/.java...
History		History log comments.
Type		Type of analyzer used to filter file types include with selected(e.g. just C sources).

Help

Searched refs:D_BDW (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
H A D	mmio.h	`44 #define D_BDW (1 << 0) macro 51 #define D_GEN8PLUS (D_BDW \| D_SKL \| D_KBL \| D_BXT \| D_CFL) 54 #define D_BDW_PLUS (D_BDW \| D_SKL \| D_KBL \| D_BXT \| D_CFL) 56 #define D_PRE_SKL (D_BDW) 57 #define D_ALL (D_BDW \| D_SKL \| D_KBL \| D_BXT \| D_CFL)`
H A D	handlers.c	55 return D_BDW; in intel_gvt_get_device_type() 2568 MMIO_DH(FORCEWAKE_ACK_HSW, D_BDW, NULL, NULL); in init_generic_mmio_info() 2600 MMIO_DH(HSW_PWR_WELL_CTL1, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2601 MMIO_DH(HSW_PWR_WELL_CTL2, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2602 MMIO_DH(HSW_PWR_WELL_CTL3, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2603 MMIO_DH(HSW_PWR_WELL_CTL4, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2604 MMIO_DH(HSW_PWR_WELL_CTL5, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2605 MMIO_DH(HSW_PWR_WELL_CTL6, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2876 MMIO_D(WM_MISC, D_BDW); in init_bdw_mmio_info() 2877 MMIO_D(_MMIO(_SRD_CTL_EDP), D_BDW); in init_bdw_mmio_info() local [all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/
H A D	mmio.h	`44 #define D_BDW (1 << 0) macro 51 #define D_GEN8PLUS (D_BDW \| D_SKL \| D_KBL \| D_BXT \| D_CFL) 54 #define D_BDW_PLUS (D_BDW \| D_SKL \| D_KBL \| D_BXT \| D_CFL) 56 #define D_PRE_SKL (D_BDW) 57 #define D_ALL (D_BDW \| D_SKL \| D_KBL \| D_BXT \| D_CFL)`
H A D	handlers.c	68 return D_BDW; in intel_gvt_get_device_type() 2369 MMIO_DH(FORCEWAKE_ACK_HSW, D_BDW, NULL, NULL); in init_generic_mmio_info() 2372 MMIO_DH(HSW_PWR_WELL_CTL1, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2373 MMIO_DH(HSW_PWR_WELL_CTL2, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2374 MMIO_DH(HSW_PWR_WELL_CTL3, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2375 MMIO_DH(HSW_PWR_WELL_CTL4, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2376 MMIO_DH(HSW_PWR_WELL_CTL5, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2377 MMIO_DH(HSW_PWR_WELL_CTL6, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2544 MMIO_DFH(_MMIO(0xb1f0), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info() 2545 MMIO_DFH(_MMIO(0xb1c0), D_BDW, F_CMD_ACCES in init_bdw_mmio_info() [all...]

Completed in 11 milliseconds