Searched refs:DWB_OGAM_RAMA_REGION_0_1 (Results 1 - 5 of 5) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dwb.h | 101 SR(DWB_OGAM_RAMA_REGION_0_1),\
262 SF_DWB2(DWB_OGAM_RAMA_REGION_0_1, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION0_LUT_OFFSET, mask_sh),\
263 SF_DWB2(DWB_OGAM_RAMA_REGION_0_1, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS, mask_sh),\
264 SF_DWB2(DWB_OGAM_RAMA_REGION_0_1, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION1_LUT_OFFSET, mask_sh),\
265 SF_DWB2(DWB_OGAM_RAMA_REGION_0_1, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION1_NUM_SEGMENTS, mask_sh),\
806 uint32_t DWB_OGAM_RAMA_REGION_0_1; member
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| H A D | dcn30_dwb_cm.c | 107 gam_regs.region_start = REG(DWB_OGAM_RAMA_REGION_0_1); in dwb3_program_ogam_luta_settings()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dwb.h | 86 SR(DWB_OGAM_RAMA_REGION_0_1),\
247 SF_DWB2(DWB_OGAM_RAMA_REGION_0_1, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION0_LUT_OFFSET, mask_sh),\
248 SF_DWB2(DWB_OGAM_RAMA_REGION_0_1, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS, mask_sh),\
249 SF_DWB2(DWB_OGAM_RAMA_REGION_0_1, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION1_LUT_OFFSET, mask_sh),\
250 SF_DWB2(DWB_OGAM_RAMA_REGION_0_1, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION1_NUM_SEGMENTS, mask_sh),\
791 uint32_t DWB_OGAM_RAMA_REGION_0_1; member
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| H A D | dcn30_dwb_cm.c | 107 gam_regs.region_start = REG(DWB_OGAM_RAMA_REGION_0_1); in dwb3_program_ogam_luta_settings()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_resource.h | 636 SR_ARR(DWB_OGAM_RAMA_REGION_0_1, id), \
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