Searched refs:DWB_OGAM_RAMA_END_CNTL1_R (Results 1 - 5 of 5) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dwb.h | 96 SR(DWB_OGAM_RAMA_END_CNTL1_R),\
256 SF_DWB2(DWB_OGAM_RAMA_END_CNTL1_R, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_END_BASE_R, mask_sh),\
801 uint32_t DWB_OGAM_RAMA_END_CNTL1_R; member
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| H A D | dcn30_dwb_cm.c | 102 gam_regs.start_end_cntl1_r = REG(DWB_OGAM_RAMA_END_CNTL1_R); in dwb3_program_ogam_luta_settings()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dwb.h | 81 SR(DWB_OGAM_RAMA_END_CNTL1_R),\
241 SF_DWB2(DWB_OGAM_RAMA_END_CNTL1_R, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_END_BASE_R, mask_sh),\
786 uint32_t DWB_OGAM_RAMA_END_CNTL1_R; member
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| H A D | dcn30_dwb_cm.c | 102 gam_regs.start_end_cntl1_r = REG(DWB_OGAM_RAMA_END_CNTL1_R); in dwb3_program_ogam_luta_settings()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_resource.h | 632 SR_ARR(DWB_OGAM_RAMA_END_CNTL1_R, id), \
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