Searched refs:DWB_ENABLE_CLK_CTRL (Results 1 - 5 of 5) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dwb.c | 97 REG_UPDATE(DWB_ENABLE_CLK_CTRL, DWB_ENABLE, 1); in dwb3_enable()
127 REG_UPDATE(DWB_ENABLE_CLK_CTRL, DWB_ENABLE, 0); in dwb3_disable()
177 REG_GET(DWB_ENABLE_CLK_CTRL, DWB_ENABLE, &dwb_enabled); in dwb3_is_enabled()
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| H A D | dcn30_dwb.h | 46 SR(DWB_ENABLE_CLK_CTRL),\
156 SF_DWB2(DWB_ENABLE_CLK_CTRL, DWB_TOP, 0, DWB_ENABLE, mask_sh),\
157 SF_DWB2(DWB_ENABLE_CLK_CTRL, DWB_TOP, 0, DISPCLK_R_DWB_GATE_DIS, mask_sh),\
158 SF_DWB2(DWB_ENABLE_CLK_CTRL, DWB_TOP, 0, DISPCLK_G_DWB_GATE_DIS, mask_sh),\
159 SF_DWB2(DWB_ENABLE_CLK_CTRL, DWB_TOP, 0, DWB_TEST_CLK_SEL, mask_sh),\
735 uint32_t DWB_ENABLE_CLK_CTRL; member
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dwb.c | 97 REG_UPDATE(DWB_ENABLE_CLK_CTRL, DWB_ENABLE, 1); in dwb3_enable()
127 REG_UPDATE(DWB_ENABLE_CLK_CTRL, DWB_ENABLE, 0); in dwb3_disable()
177 REG_GET(DWB_ENABLE_CLK_CTRL, DWB_ENABLE, &dwb_enabled); in dwb3_is_enabled()
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| H A D | dcn30_dwb.h | 31 SR(DWB_ENABLE_CLK_CTRL),\
141 SF_DWB2(DWB_ENABLE_CLK_CTRL, DWB_TOP, 0, DWB_ENABLE, mask_sh),\
142 SF_DWB2(DWB_ENABLE_CLK_CTRL, DWB_TOP, 0, DISPCLK_R_DWB_GATE_DIS, mask_sh),\
143 SF_DWB2(DWB_ENABLE_CLK_CTRL, DWB_TOP, 0, DISPCLK_G_DWB_GATE_DIS, mask_sh),\
144 SF_DWB2(DWB_ENABLE_CLK_CTRL, DWB_TOP, 0, DWB_TEST_CLK_SEL, mask_sh),\
720 uint32_t DWB_ENABLE_CLK_CTRL; member
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_resource.h | 593 SR_ARR(DWB_ENABLE_CLK_CTRL, id), SR_ARR(DWB_MEM_PWR_CTRL, id), \
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