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Searched refs:DRA7XX_CM_CORE_AON_IPU_INST (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/arch/arm/mach-omap2/
H A Dcm1_7xx.h33 #define DRA7XX_CM_CORE_AON_IPU_INST 0x0500 macro
259 #define DRA7XX_CM_IPU1_IPU1_CLKCTRL DRA7XX_CM_CORE_AON_REGADDR(DRA7XX_CM_CORE_AON_IPU_INST, 0x0020)
262 #define DRA7XX_CM_IPU_MCASP1_CLKCTRL DRA7XX_CM_CORE_AON_REGADDR(DRA7XX_CM_CORE_AON_IPU_INST, 0x0050)
264 #define DRA7XX_CM_IPU_TIMER5_CLKCTRL DRA7XX_CM_CORE_AON_REGADDR(DRA7XX_CM_CORE_AON_IPU_INST, 0x0058)
266 #define DRA7XX_CM_IPU_TIMER6_CLKCTRL DRA7XX_CM_CORE_AON_REGADDR(DRA7XX_CM_CORE_AON_IPU_INST, 0x0060)
268 #define DRA7XX_CM_IPU_TIMER7_CLKCTRL DRA7XX_CM_CORE_AON_REGADDR(DRA7XX_CM_CORE_AON_IPU_INST, 0x0068)
270 #define DRA7XX_CM_IPU_TIMER8_CLKCTRL DRA7XX_CM_CORE_AON_REGADDR(DRA7XX_CM_CORE_AON_IPU_INST, 0x0070)
272 #define DRA7XX_CM_IPU_I2C5_CLKCTRL DRA7XX_CM_CORE_AON_REGADDR(DRA7XX_CM_CORE_AON_IPU_INST, 0x0078)
274 #define DRA7XX_CM_IPU_UART6_CLKCTRL DRA7XX_CM_CORE_AON_REGADDR(DRA7XX_CM_CORE_AON_IPU_INST, 0x0080)
H A Dclockdomains7xx_data.c368 .cm_inst = DRA7XX_CM_CORE_AON_IPU_INST,
458 .cm_inst = DRA7XX_CM_CORE_AON_IPU_INST,
/kernel/linux/linux-6.6/arch/arm/mach-omap2/
H A Dcm1_7xx.h33 #define DRA7XX_CM_CORE_AON_IPU_INST 0x0500 macro
H A Dclockdomains7xx_data.c368 .cm_inst = DRA7XX_CM_CORE_AON_IPU_INST,
458 .cm_inst = DRA7XX_CM_CORE_AON_IPU_INST,

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