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Searched refs:DMA_STATUS_REG (Results 1 - 20 of 20) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dni.c870 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in cayman_get_allowed_info_register()
871 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in cayman_get_allowed_info_register()
1768 /* DMA_STATUS_REG 0 */ in cayman_gpu_check_soft_reset()
1769 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()
1773 /* DMA_STATUS_REG 1 */ in cayman_gpu_check_soft_reset()
1774 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()
H A Dnid.h1330 #define DMA_STATUS_REG 0xd034 macro
H A Dr600.c181 case DMA_STATUS_REG: in r600_get_allowed_info_register()
1584 RREG32(DMA_STATUS_REG)); in r600_print_gpu_status_regs()
1646 /* DMA_STATUS_REG */ in r600_gpu_check_soft_reset()
1647 tmp = RREG32(DMA_STATUS_REG); in r600_gpu_check_soft_reset()
H A Devergreen.c1105 case DMA_STATUS_REG: in evergreen_get_allowed_info_register()
3790 RREG32(DMA_STATUS_REG)); in evergreen_print_gpu_status_regs()
3793 RREG32(DMA_STATUS_REG + 0x800)); in evergreen_print_gpu_status_regs()
3847 /* DMA_STATUS_REG */ in evergreen_gpu_check_soft_reset()
3848 tmp = RREG32(DMA_STATUS_REG); in evergreen_gpu_check_soft_reset()
H A Dsi.c1322 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in si_get_allowed_info_register()
1323 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in si_get_allowed_info_register()
3805 /* DMA_STATUS_REG 0 */ in si_gpu_check_soft_reset()
3806 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in si_gpu_check_soft_reset()
3810 /* DMA_STATUS_REG 1 */ in si_gpu_check_soft_reset()
3811 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in si_gpu_check_soft_reset()
H A Dsid.h1840 #define DMA_STATUS_REG 0xd034 macro
H A Devergreend.h2625 #define DMA_STATUS_REG 0xd034 macro
H A Dr600d.h638 #define DMA_STATUS_REG 0xd034 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dni.c857 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in cayman_get_allowed_info_register()
858 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in cayman_get_allowed_info_register()
1755 /* DMA_STATUS_REG 0 */ in cayman_gpu_check_soft_reset()
1756 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()
1760 /* DMA_STATUS_REG 1 */ in cayman_gpu_check_soft_reset()
1761 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()
H A Dnid.h1330 #define DMA_STATUS_REG 0xd034 macro
H A Dr600.c181 case DMA_STATUS_REG: in r600_get_allowed_info_register()
1583 RREG32(DMA_STATUS_REG)); in r600_print_gpu_status_regs()
1645 /* DMA_STATUS_REG */ in r600_gpu_check_soft_reset()
1646 tmp = RREG32(DMA_STATUS_REG); in r600_gpu_check_soft_reset()
H A Dsi.c1317 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in si_get_allowed_info_register()
1318 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in si_get_allowed_info_register()
3800 /* DMA_STATUS_REG 0 */ in si_gpu_check_soft_reset()
3801 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in si_gpu_check_soft_reset()
3805 /* DMA_STATUS_REG 1 */ in si_gpu_check_soft_reset()
3806 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in si_gpu_check_soft_reset()
H A Devergreen.c1101 case DMA_STATUS_REG: in evergreen_get_allowed_info_register()
3792 RREG32(DMA_STATUS_REG)); in evergreen_print_gpu_status_regs()
3795 RREG32(DMA_STATUS_REG + 0x800)); in evergreen_print_gpu_status_regs()
3849 /* DMA_STATUS_REG */ in evergreen_gpu_check_soft_reset()
3850 tmp = RREG32(DMA_STATUS_REG); in evergreen_gpu_check_soft_reset()
H A Dsid.h1840 #define DMA_STATUS_REG 0xd034 macro
H A Devergreend.h2625 #define DMA_STATUS_REG 0xd034 macro
H A Dr600d.h638 #define DMA_STATUS_REG 0xd034 macro
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dsi.c1009 {DMA_STATUS_REG + DMA0_REGISTER_OFFSET},
1010 {DMA_STATUS_REG + DMA1_REGISTER_OFFSET},
H A Dsid.h1904 #define DMA_STATUS_REG 0x340d macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dsi.c1119 {DMA_STATUS_REG + DMA0_REGISTER_OFFSET},
1120 {DMA_STATUS_REG + DMA1_REGISTER_OFFSET},
H A Dsid.h1904 #define DMA_STATUS_REG 0x340d macro

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