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Searched refs:DGCS (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/vme/bridges/
H A Dvme_ca91cx42.c100 val = ioread32(bridge->base + DGCS); in ca91cx42_VERR_irqhandler()
104 "Read Error DGCS=%08X\n", val); in ca91cx42_VERR_irqhandler()
117 val = ioread32(bridge->base + DGCS); in ca91cx42_LERR_irqhandler()
121 "Read Error DGCS=%08X\n", val); in ca91cx42_LERR_irqhandler()
1169 tmp = ioread32(bridge->base + DGCS); in ca91cx42_dma_busy()
1219 val = ioread32(bridge->base + DGCS); in ca91cx42_dma_list_exec()
1228 iowrite32(val, bridge->base + DGCS); in ca91cx42_dma_list_exec()
1232 iowrite32(val, bridge->base + DGCS); in ca91cx42_dma_list_exec()
1238 val = ioread32(bridge->base + DGCS); in ca91cx42_dma_list_exec()
1239 iowrite32(val | CA91CX42_DGCS_STOP_REQ, bridge->base + DGCS); in ca91cx42_dma_list_exec()
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H A Dvme_ca91cx42.h146 #define DGCS 0x0220 macro
392 * DMA General Control/Status Register (DGCS)

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