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Searched refs:DEV_CLOCK_CFG (Results 1 - 14 of 14) sorted by relevance

/kernel/linux/linux-6.6/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_port.c56 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_down()
122 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_down()
132 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_down()
262 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_up()
391 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_pcs_set()
570 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_init()
H A Dlan966x_phylink.c82 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_phylink_mac_link_down()
H A Dlan966x_regs.h713 #define DEV_CLOCK_CFG(t) __REG(TARGET_DEV, t, 8, 0, 0, 1, 28, 0, 0, 1, 4) macro
/kernel/linux/linux-5.10/drivers/net/dsa/ocelot/
H A Dfelix.c234 DEV_CLOCK_CFG); in felix_phylink_mac_link_down()
250 * PORT_RST bits in DEV_CLOCK_CFG. Note that the way this system is in felix_phylink_mac_link_up()
253 * the LINK_SPEED field of DEV_CLOCK_CFG (which is also its default in felix_phylink_mac_link_up()
258 DEV_CLOCK_CFG); in felix_phylink_mac_link_up()
H A Dseville_vsc9953.c317 REG(DEV_CLOCK_CFG, 0x0),
H A Dfelix_vsc9959.c325 REG(DEV_CLOCK_CFG, 0x0),
/kernel/linux/linux-5.10/drivers/net/ethernet/mscc/
H A Docelot_vsc7514.c276 REG(DEV_CLOCK_CFG, 0x0),
1131 DEV_CLOCK_CFG); in mscc_ocelot_init_ports()
H A Docelot.c471 DEV_CLOCK_CFG); in ocelot_adjust_link()
/kernel/linux/linux-5.10/include/soc/mscc/
H A Docelot.h411 DEV_CLOCK_CFG = DEV_GMII << TARGET_OFFSET, enumerator
/kernel/linux/linux-6.6/drivers/net/ethernet/mscc/
H A Docelot.c826 DEV_CLOCK_CFG); in ocelot_port_configure_serdes()
913 DEV_CLOCK_CFG); in ocelot_phylink_mac_link_down()
933 * to write "1000Mbps" into the LINK_SPEED field of DEV_CLOCK_CFG in ocelot_phylink_mac_link_up()
955 * PORT_RST bits in DEV_CLOCK_CFG. in ocelot_phylink_mac_link_up()
958 DEV_CLOCK_CFG); in ocelot_phylink_mac_link_up()
H A Dvsc7514_regs.c383 REG(DEV_CLOCK_CFG, 0x0),
/kernel/linux/linux-6.6/drivers/net/dsa/ocelot/
H A Dseville_vsc9953.c407 REG(DEV_CLOCK_CFG, 0x0),
H A Dfelix_vsc9959.c463 REG(DEV_CLOCK_CFG, 0x0),
/kernel/linux/linux-6.6/include/soc/mscc/
H A Docelot.h502 DEV_CLOCK_CFG = DEV_GMII << TARGET_OFFSET, enumerator

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