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Searched refs:DC_WR_CH_CONF (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/ipu-v3/
H A Dipu-dc.c44 #define DC_WR_CH_CONF 0x0 macro
212 reg = readl(dc->base + DC_WR_CH_CONF); in ipu_dc_init_sync()
217 writel(reg, dc->base + DC_WR_CH_CONF); in ipu_dc_init_sync()
245 reg = readl(dc->base + DC_WR_CH_CONF); in ipu_dc_enable_channel()
247 writel(reg, dc->base + DC_WR_CH_CONF); in ipu_dc_enable_channel()
255 val = readl(dc->base + DC_WR_CH_CONF); in ipu_dc_disable_channel()
257 writel(val, dc->base + DC_WR_CH_CONF); in ipu_dc_disable_channel()
367 priv->channels[1].base + DC_WR_CH_CONF); in ipu_dc_init()
369 priv->channels[5].base + DC_WR_CH_CONF); in ipu_dc_init()
/kernel/linux/linux-6.6/drivers/gpu/ipu-v3/
H A Dipu-dc.c44 #define DC_WR_CH_CONF 0x0 macro
217 reg = readl(dc->base + DC_WR_CH_CONF); in ipu_dc_init_sync()
222 writel(reg, dc->base + DC_WR_CH_CONF); in ipu_dc_init_sync()
250 reg = readl(dc->base + DC_WR_CH_CONF); in ipu_dc_enable_channel()
252 writel(reg, dc->base + DC_WR_CH_CONF); in ipu_dc_enable_channel()
260 val = readl(dc->base + DC_WR_CH_CONF); in ipu_dc_disable_channel()
262 writel(val, dc->base + DC_WR_CH_CONF); in ipu_dc_disable_channel()
373 priv->channels[1].base + DC_WR_CH_CONF); in ipu_dc_init()
375 priv->channels[5].base + DC_WR_CH_CONF); in ipu_dc_init()

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