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Searched refs:DCN_BASE (Results 1 - 19 of 19) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dnavi10_reg_init.c43 adev->reg_offset[DCE_HWIP][i] = (uint32_t *)(&(DCN_BASE.instance[i])); in navi10_reg_base_init()
H A Dsienna_cichlid_reg_init.c44 adev->reg_offset[DCE_HWIP][i] = (uint32_t *)(&(DCN_BASE.instance[i])); in sienna_cichlid_reg_base_init()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Ddimgrey_cavefish_reg_init.c44 adev->reg_offset[DCE_HWIP][i] = (uint32_t *)(&(DCN_BASE.instance[i])); in dimgrey_cavefish_reg_base_init()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
H A Dnavi10_ip_offset.h55 static const struct IP_BASE DCN_BASE ={ { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0, 0 } }, variable
H A Drenoir_ip_offset.h172 static const struct IP_BASE DCN_BASE ={ { { { 0x00000012, 0x000000C0, 0x000034C0, 0, 0 } }, variable
H A Dsienna_cichlid_ip_offset.h67 static const struct IP_BASE DCN_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00 } }, variable
H A Dvega10_ip_offset.h53 static const struct IP_BASE DCN_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0, 0 } }, variable
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/
H A Dnavi10_ip_offset.h55 static const struct IP_BASE DCN_BASE ={ { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0, 0 } }, variable
H A Ddimgrey_cavefish_ip_offset.h67 static const struct IP_BASE DCN_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } }, variable
H A Dbeige_goby_ip_offset.h75 static const struct IP_BASE DCN_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } }, variable
H A Dsienna_cichlid_ip_offset.h67 static const struct IP_BASE DCN_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00 } }, variable
H A Dyellow_carp_offset.h47 static const struct IP_BASE DCN_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } }, variable
H A Drenoir_ip_offset.h172 static const struct IP_BASE DCN_BASE ={ { { { 0x00000012, 0x000000C0, 0x000034C0, 0, 0 } }, variable
H A Dvega10_ip_offset.h53 static const struct IP_BASE __maybe_unused DCN_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0, 0 } }, variable
H A Dvangogh_ip_offset.h74 static const struct IP_BASE DCN_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } }, variable
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_resource.c1739 (DCN_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_resource.c1361 (DCN_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn301/
H A Ddcn301_resource.c918 (DCN_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_resource.c2236 (DCN_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)

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