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Searched refs:DCLK (Results 1 - 25 of 27) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/
H A Dpower_state.h144 uint32_t DCLK; member
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
H A Dintel_llc.c62 intel_uncore_read(llc_to_gt(llc)->uncore, DCLK) & 0xf; in get_ia_constants()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dpower_state.h145 uint32_t DCLK; member
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/
H A Dintel_llc.c62 intel_uncore_read(llc_to_gt(llc)->uncore, DCLK) & 0xf; in get_ia_constants()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/
H A Dintel_mchbar_regs.h239 #define DCLK _MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5e04) macro
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dprocesspptables.c763 ps->uvd_clocks.DCLK = le32_to_cpu(pnon_clock_info->ulDCLK); in init_non_clock_fields()
766 ps->uvd_clocks.DCLK = 0; in init_non_clock_fields()
H A Dsmu10_hwmgr.c850 smu10_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK; in smu10_dpm_get_pp_table_entry()
H A Dsmu7_hwmgr.c3262 power_state->uvd_clocks.DCLK = 0; in smu7_get_pp_table_entry_callback_func_v1()
3355 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in smu7_get_pp_table_entry_v1()
3503 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in smu7_get_pp_table_entry_v0()
H A Dsmu8_hwmgr.c1416 smu8_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK; in smu8_dpm_get_pp_table_entry()
H A Dvega10_hwmgr.c2060 "Failed to get DCLK clock settings from VBIOS!", in vega10_populate_single_dclock_level()
3141 power_state->uvd_clocks.DCLK = 0; in vega10_get_pp_table_entry_callback_func()
3219 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in vega10_get_pp_table_entry()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dprocesspptables.c759 ps->uvd_clocks.DCLK = le32_to_cpu(pnon_clock_info->ulDCLK); in init_non_clock_fields()
762 ps->uvd_clocks.DCLK = 0; in init_non_clock_fields()
H A Dsmu10_hwmgr.c934 smu10_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK; in smu10_dpm_get_pp_table_entry()
H A Dsmu8_hwmgr.c1428 smu8_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK; in smu8_dpm_get_pp_table_entry()
H A Dsmu7_hwmgr.c3636 power_state->uvd_clocks.DCLK = 0; in smu7_get_pp_table_entry_callback_func_v1()
3729 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in smu7_get_pp_table_entry_v1()
3877 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in smu7_get_pp_table_entry_v0()
H A Dvega10_hwmgr.c2060 "Failed to get DCLK clock settings from VBIOS!", in vega10_populate_single_dclock_level()
3166 power_state->uvd_clocks.DCLK = 0; in vega10_get_pp_table_entry_callback_func()
3246 vega10_ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in vega10_get_pp_table_entry()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c122 CLK_MAP(DCLK, CLOCK_DCLK),
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_6_ppt.c143 CLK_MAP(DCLK, PPCLK_DCLK),
H A Dsmu_v13_0_7_ppt.c148 CLK_MAP(DCLK, PPCLK_DCLK_0),
H A Daldebaran_ppt.c164 CLK_MAP(DCLK, PPCLK_DCLK),
H A Dsmu_v13_0_0_ppt.c177 CLK_MAP(DCLK, PPCLK_DCLK_0),
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dnavi10_ppt.c155 CLK_MAP(DCLK, PPCLK_DCLK),
H A Darcturus_ppt.c154 CLK_MAP(DCLK, PPCLK_DCLK),
H A Dsienna_cichlid_ppt.c139 CLK_MAP(DCLK, PPCLK_DCLK_0),
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Darcturus_ppt.c171 CLK_MAP(DCLK, PPCLK_DCLK),
H A Dnavi10_ppt.c156 CLK_MAP(DCLK, PPCLK_DCLK),

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