Searched refs:CURBASE (Results 1 - 12 of 12) sorted by relevance
| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| H A D | intel_cursor.c | 284 intel_de_write_fw(dev_priv, CURBASE(PIPE_A), base); in i845_cursor_update_arm()
512 * cause CURPOS to be armed by the CURBASE write. in i9xx_cursor_update_arm()
518 * CURBASE write to arm the update. Additonally in i9xx_cursor_update_arm()
521 * the CURBASE write after CURPOS could lead to a in i9xx_cursor_update_arm()
523 * shape. Thus we always write CURBASE. in i9xx_cursor_update_arm()
525 * The other registers are armed by the CURBASE write in i9xx_cursor_update_arm()
547 intel_de_write_fw(dev_priv, CURBASE(pipe), base); in i9xx_cursor_update_arm()
554 intel_de_write_fw(dev_priv, CURBASE(pipe), base); in i9xx_cursor_update_arm()
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| /kernel/linux/linux-5.10/drivers/video/fbdev/i810/ |
| H A D | i810_regs.h | 168 #define CURBASE 0x70084 macro
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| H A D | i810_main.c | 855 i810_writel(CURBASE, mmio, par->cursor_heap.physical); in i810_init_cursor()
1489 if ((i810_readl(CURBASE, mmio) & 0xf) != par->cursor_heap.physical) { in i810fb_cursor()
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| /kernel/linux/linux-6.6/drivers/video/fbdev/i810/ |
| H A D | i810_regs.h | 168 #define CURBASE 0x70084 macro
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| H A D | i810_main.c | 856 i810_writel(CURBASE, mmio, par->cursor_heap.physical); in i810_init_cursor()
1490 if ((i810_readl(CURBASE, mmio) & 0xf) != par->cursor_heap.physical) { in i810fb_cursor()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/ |
| H A D | fb_decoder.c | 370 plane->base = vgpu_vreg_t(vgpu, CURBASE(pipe)) & I915_GTT_PAGE_MASK; in intel_vgpu_decode_cursor_plane()
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| H A D | handlers.c | 2068 MMIO_D(CURBASE(PIPE_A), D_ALL); in init_generic_mmio_info()
2069 MMIO_D(CURBASE(PIPE_B), D_ALL); in init_generic_mmio_info()
2070 MMIO_D(CURBASE(PIPE_C), D_ALL); in init_generic_mmio_info()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/ |
| H A D | fb_decoder.c | 371 plane->base = vgpu_vreg_t(vgpu, CURBASE(pipe)) & I915_GTT_PAGE_MASK; in intel_vgpu_decode_cursor_plane()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/ |
| H A D | intel_gvt_mmio_table.c | 147 MMIO_D(CURBASE(PIPE_A)); in iterate_generic_mmio()
148 MMIO_D(CURBASE(PIPE_B)); in iterate_generic_mmio()
149 MMIO_D(CURBASE(PIPE_C)); in iterate_generic_mmio()
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| H A D | i915_reg.h | 3095 #define CURBASE(pipe) _MMIO_CURSOR2(pipe, _CURABASE) macro
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
| H A D | intel_display.c | 11570 intel_de_write_fw(dev_priv, CURBASE(PIPE_A), base); in i845_update_cursor()
11798 * cause CURPOS to be armed by the CURBASE write. in i9xx_update_cursor()
11804 * CURBASE write to arm the update. Additonally in i9xx_update_cursor()
11807 * the CURBASE write after CURPOS could lead to a in i9xx_update_cursor()
11809 * shape. Thus we always write CURBASE. in i9xx_update_cursor()
11811 * The other registers are armed by by the CURBASE write in i9xx_update_cursor()
11827 intel_de_write_fw(dev_priv, CURBASE(pipe), base); in i9xx_update_cursor()
11834 intel_de_write_fw(dev_priv, CURBASE(pipe), base); in i9xx_update_cursor()
19037 error->cursor[i].base = intel_de_read(dev_priv, CURBASE(i)); in intel_display_capture_error_state()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| H A D | i915_reg.h | 6469 #define CURBASE(pipe) _CURSOR2(pipe, _CURABASE) macro
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