| /kernel/linux/linux-5.10/drivers/net/ethernet/dec/tulip/ |
| H A D | interrupt.c | 93 if(((ioread32(tp->base_addr + CSR5)>>17)&0x07) == 4) { in tulip_refill_rx()
135 if (ioread32(tp->base_addr + CSR5) == 0xffffffff) { in tulip_poll()
140 iowrite32((RxIntr | RxNoBuf), tp->base_addr + CSR5); in tulip_poll()
280 } while ((ioread32(tp->base_addr + CSR5) & RxIntr)); in tulip_poll()
544 csr5 = ioread32(ioaddr + CSR5); in tulip_interrupt()
571 iowrite32(csr5 & 0x0001ff3f, ioaddr + CSR5); in tulip_interrupt()
575 iowrite32(csr5 & 0x0001ffff, ioaddr + CSR5); in tulip_interrupt()
587 csr5, ioread32(ioaddr + CSR5)); in tulip_interrupt()
667 "The transmitter stopped. CSR5 is %x, CSR6 %x, new CSR6 %x\n", in tulip_interrupt()
726 iowrite32(0x0800f7ba, ioaddr + CSR5); in tulip_interrupt()
[all...] |
| H A D | pnic.c | 59 netdev_dbg(dev, "PNIC link changed state %08x, CSR5 %08x\n", in pnic_lnk_change()
61 if (ioread32(ioaddr + CSR5) & TPLnkFail) { in pnic_lnk_change()
75 } else if (ioread32(ioaddr + CSR5) & TPLnkPass) { in pnic_lnk_change()
112 int csr5 = ioread32(ioaddr + CSR5); in pnic_timer()
115 netdev_dbg(dev, "PNIC timer PHY status %08x, %s CSR5 %08x\n", in pnic_timer()
126 netdev_dbg(dev, "%s link beat failed, CSR12 %04x, CSR5 %08x, PHY %03x\n", in pnic_timer()
129 ioread32(ioaddr + CSR5), in pnic_timer()
|
| H A D | xircom_cb.c | 53 #define CSR5 0x28 macro
333 status = xr32(CSR5); in xircom_interrupt()
363 xw32(CSR5, status); in xircom_interrupt()
645 val = xr32(CSR5); /* Status register */ in link_status_changed()
652 xw32(CSR5, val); in link_status_changed()
666 if (!(xr32(CSR5) & (7 << 20))) /* transmitter disabled */ in transmit_active()
680 if (!(xr32(CSR5) & (7 << 17))) /* receiver disabled */ in receive_active()
|
| H A D | tulip.h | 111 CSR5 = 0x28, enumerator
138 /* The bits in the CSR5 status registers, mostly interrupt sources. */
158 /* bit mask for CSR5 TX/RX process state */
543 while (--i && (ioread32(ioaddr + CSR5) & (CSR5_TS|CSR5_RS))) in tulip_stop_rxtx()
547 netdev_dbg(tp->dev, "tulip_stop_rxtx() failed (CSR5 0x%x CSR6 0x%x)\n", in tulip_stop_rxtx()
548 ioread32(ioaddr + CSR5), in tulip_stop_rxtx()
|
| H A D | tulip_core.c | 434 iowrite32(ioread32(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5); in tulip_up() local
442 } else if (ioread32(ioaddr + CSR5) & TPLnkPass) in tulip_up()
480 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5); in tulip_up()
486 netdev_dbg(dev, "Done tulip_up(), CSR0 %08x, CSR5 %08x CSR6 %08x\n", in tulip_up()
488 ioread32(ioaddr + CSR5), in tulip_up()
544 ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12), in tulip_tx_timeout()
553 (int)ioread32(ioaddr + CSR5), in tulip_tx_timeout()
560 ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12)); in tulip_tx_timeout()
830 ioread32 (ioaddr + CSR5)); in tulip_close()
[all...] |
| H A D | timer.c | 30 ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR6), in tulip_media_task()
|
| H A D | 21142.c | 151 "21143 link status interrupt %08x, CSR5 %x, %08x\n", in t21142_lnk_change()
206 netdev_dbg(dev, " Restarting Tx and Rx, CSR5 is %08x\n", in t21142_lnk_change()
207 ioread32(ioaddr + CSR5)); in t21142_lnk_change()
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/dec/tulip/ |
| H A D | interrupt.c | 93 if(((ioread32(tp->base_addr + CSR5)>>17)&0x07) == 4) { in tulip_refill_rx()
135 if (ioread32(tp->base_addr + CSR5) == 0xffffffff) { in tulip_poll()
140 iowrite32((RxIntr | RxNoBuf), tp->base_addr + CSR5); in tulip_poll()
280 } while ((ioread32(tp->base_addr + CSR5) & RxIntr)); in tulip_poll()
544 csr5 = ioread32(ioaddr + CSR5); in tulip_interrupt()
571 iowrite32(csr5 & 0x0001ff3f, ioaddr + CSR5); in tulip_interrupt()
575 iowrite32(csr5 & 0x0001ffff, ioaddr + CSR5); in tulip_interrupt()
587 csr5, ioread32(ioaddr + CSR5)); in tulip_interrupt()
667 "The transmitter stopped. CSR5 is %x, CSR6 %x, new CSR6 %x\n", in tulip_interrupt()
726 iowrite32(0x0800f7ba, ioaddr + CSR5); in tulip_interrupt()
[all...] |
| H A D | pnic.c | 59 netdev_dbg(dev, "PNIC link changed state %08x, CSR5 %08x\n", in pnic_lnk_change()
61 if (ioread32(ioaddr + CSR5) & TPLnkFail) { in pnic_lnk_change()
75 } else if (ioread32(ioaddr + CSR5) & TPLnkPass) { in pnic_lnk_change()
112 int csr5 = ioread32(ioaddr + CSR5); in pnic_timer()
115 netdev_dbg(dev, "PNIC timer PHY status %08x, %s CSR5 %08x\n", in pnic_timer()
126 netdev_dbg(dev, "%s link beat failed, CSR12 %04x, CSR5 %08x, PHY %03x\n", in pnic_timer()
129 ioread32(ioaddr + CSR5), in pnic_timer()
|
| H A D | xircom_cb.c | 53 #define CSR5 0x28 macro
333 status = xr32(CSR5); in xircom_interrupt()
363 xw32(CSR5, status); in xircom_interrupt()
645 val = xr32(CSR5); /* Status register */ in link_status_changed()
652 xw32(CSR5, val); in link_status_changed()
666 if (!(xr32(CSR5) & (7 << 20))) /* transmitter disabled */ in transmit_active()
680 if (!(xr32(CSR5) & (7 << 17))) /* receiver disabled */ in receive_active()
|
| H A D | tulip.h | 111 CSR5 = 0x28, enumerator
138 /* The bits in the CSR5 status registers, mostly interrupt sources. */
158 /* bit mask for CSR5 TX/RX process state */
542 while (--i && (ioread32(ioaddr + CSR5) & (CSR5_TS|CSR5_RS))) in tulip_stop_rxtx()
546 netdev_dbg(tp->dev, "tulip_stop_rxtx() failed (CSR5 0x%x CSR6 0x%x)\n", in tulip_stop_rxtx()
547 ioread32(ioaddr + CSR5), in tulip_stop_rxtx()
|
| H A D | tulip_core.c | 434 iowrite32(ioread32(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5); in tulip_up() local
442 } else if (ioread32(ioaddr + CSR5) & TPLnkPass) in tulip_up()
480 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5); in tulip_up()
486 netdev_dbg(dev, "Done tulip_up(), CSR0 %08x, CSR5 %08x CSR6 %08x\n", in tulip_up()
488 ioread32(ioaddr + CSR5), in tulip_up()
544 ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12), in tulip_tx_timeout()
553 (int)ioread32(ioaddr + CSR5), in tulip_tx_timeout()
560 ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12)); in tulip_tx_timeout()
830 ioread32 (ioaddr + CSR5)); in tulip_close()
[all...] |
| H A D | timer.c | 30 ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR6), in tulip_media_task()
|
| H A D | 21142.c | 151 "21143 link status interrupt %08x, CSR5 %x, %08x\n", in t21142_lnk_change()
206 netdev_dbg(dev, " Restarting Tx and Rx, CSR5 is %08x\n", in t21142_lnk_change()
207 ioread32(ioaddr + CSR5)); in t21142_lnk_change()
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/amd/ |
| H A D | pcnet32.c | 204 #define CSR5 5 macro
688 /* set SUSPEND (SPND) - CSR5 bit 0 */ in pcnet32_suspend()
689 csr5 = a->read_csr(ioaddr, CSR5); in pcnet32_suspend()
690 a->write_csr(ioaddr, CSR5, csr5 | CSR5_SUSPEND); in pcnet32_suspend()
694 while (!(a->read_csr(ioaddr, CSR5) & CSR5_SUSPEND)) { in pcnet32_suspend()
713 int csr5 = lp->a->read_csr(ioaddr, CSR5); in pcnet32_clr_suspend()
714 /* clear SUSPEND (SPND) - CSR5 bit 0 */ in pcnet32_clr_suspend()
715 lp->a->write_csr(ioaddr, CSR5, csr5 & ~CSR5_SUSPEND); in pcnet32_clr_suspend()
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/amd/ |
| H A D | pcnet32.c | 204 #define CSR5 5 macro
688 /* set SUSPEND (SPND) - CSR5 bit 0 */ in pcnet32_suspend()
689 csr5 = a->read_csr(ioaddr, CSR5); in pcnet32_suspend()
690 a->write_csr(ioaddr, CSR5, csr5 | CSR5_SUSPEND); in pcnet32_suspend()
694 while (!(a->read_csr(ioaddr, CSR5) & CSR5_SUSPEND)) { in pcnet32_suspend()
713 int csr5 = lp->a->read_csr(ioaddr, CSR5); in pcnet32_clr_suspend()
714 /* clear SUSPEND (SPND) - CSR5 bit 0 */ in pcnet32_clr_suspend()
715 lp->a->write_csr(ioaddr, CSR5, csr5 & ~CSR5_SUSPEND); in pcnet32_clr_suspend()
|
| /kernel/linux/linux-5.10/drivers/net/wireless/ralink/rt2x00/ |
| H A D | rt2400pci.h | 90 * CSR5: BSSID register 0.
92 #define CSR5 0x0014 macro
|
| H A D | rt2500pci.h | 101 * CSR5: BSSID register 0.
103 #define CSR5 0x0014 macro
|
| H A D | rt2500pci.c | 313 rt2x00mmio_register_multiwrite(rt2x00dev, CSR5, in rt2500pci_config_intf()
|
| H A D | rt2400pci.c | 307 rt2x00mmio_register_multiwrite(rt2x00dev, CSR5, in rt2400pci_config_intf()
|
| /kernel/linux/linux-6.6/drivers/net/wireless/ralink/rt2x00/ |
| H A D | rt2400pci.h | 90 * CSR5: BSSID register 0.
92 #define CSR5 0x0014 macro
|
| H A D | rt2500pci.h | 101 * CSR5: BSSID register 0.
103 #define CSR5 0x0014 macro
|
| H A D | rt2500pci.c | 313 rt2x00mmio_register_multiwrite(rt2x00dev, CSR5, in rt2500pci_config_intf()
|
| H A D | rt2400pci.c | 307 rt2x00mmio_register_multiwrite(rt2x00dev, CSR5, in rt2400pci_config_intf()
|