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Searched refs:CP_MQD_CONTROL (Results 1 - 15 of 15) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v10_1.c652 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in mes_v10_1_mqd_init()
748 /* set CP_MQD_CONTROL.VMID=0 */ in mes_v10_1_queue_init_register()
750 data = REG_SET_FIELD(data, CP_MQD_CONTROL, VMID, 0); in mes_v10_1_queue_init_register()
H A Dgfx_v9_0.c3484 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in gfx_v9_0_mqd_init()
H A Dgfx_v8_0.c4489 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in gfx_v8_0_mqd_init()
H A Dgfx_v10_0.c6434 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in gfx_v10_0_compute_mqd_init()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v11_0.c748 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in mes_v11_0_mqd_init()
837 /* set CP_MQD_CONTROL.VMID=0 */ in mes_v11_0_queue_init_register()
839 data = REG_SET_FIELD(data, CP_MQD_CONTROL, VMID, 0); in mes_v11_0_queue_init_register()
H A Dmes_v10_1.c668 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in mes_v10_1_mqd_init()
762 /* set CP_MQD_CONTROL.VMID=0 */
764 data = REG_SET_FIELD(data, CP_MQD_CONTROL, VMID, 0);
H A Dgfx_v9_4_3.c1535 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in gfx_v9_4_3_xcc_mqd_init()
H A Dgfx_v9_0.c3313 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in gfx_v9_0_mqd_init()
H A Dgfx_v8_0.c4454 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in gfx_v8_0_mqd_init()
H A Dgfx_v11_0.c3796 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in gfx_v11_0_compute_mqd_init()
H A Dgfx_v10_0.c6556 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in gfx_v10_0_compute_mqd_init()
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dcikd.h1542 #define CP_MQD_CONTROL 0xC99C macro
H A Dcik.c4656 mqd->queue_state.cp_mqd_control = RREG32(CP_MQD_CONTROL); in cik_cp_compute_resume()
4658 WREG32(CP_MQD_CONTROL, mqd->queue_state.cp_mqd_control); in cik_cp_compute_resume()
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dcikd.h1542 #define CP_MQD_CONTROL 0xC99C macro
H A Dcik.c4646 mqd->queue_state.cp_mqd_control = RREG32(CP_MQD_CONTROL); in cik_cp_compute_resume()
4648 WREG32(CP_MQD_CONTROL, mqd->queue_state.cp_mqd_control); in cik_cp_compute_resume()

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