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Searched refs:CPU_CTRL (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/arch/arm/mach-orion5x/
H A Dbridge-regs.h16 #define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104) macro
/kernel/linux/linux-6.6/arch/arm/mach-orion5x/
H A Dbridge-regs.h11 #define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104) macro
/kernel/linux/linux-6.6/drivers/accel/ivpu/
H A Divpu_hw_37xx.c361 if (!REG_TEST_FLD_NUM(MTL_VPU_TOP_NOC_QREQN, CPU_CTRL, exp_val, val) || in ivpu_boot_top_noc_qrenqn_check()
372 if (!REG_TEST_FLD_NUM(MTL_VPU_TOP_NOC_QACCEPTN, CPU_CTRL, exp_val, val) || in ivpu_boot_top_noc_qacceptn_check()
383 if (!REG_TEST_FLD_NUM(MTL_VPU_TOP_NOC_QDENY, CPU_CTRL, exp_val, val) || in ivpu_boot_top_noc_qdeny_check()
439 val = REG_SET_FLD(MTL_VPU_TOP_NOC_QREQN, CPU_CTRL, val); in ivpu_boot_host_ss_top_noc_drive()
442 val = REG_CLR_FLD(MTL_VPU_TOP_NOC_QREQN, CPU_CTRL, val); in ivpu_boot_host_ss_top_noc_drive()
H A Divpu_hw_40xx.c336 if (!REG_TEST_FLD_NUM(VPU_40XX_TOP_NOC_QREQN, CPU_CTRL, exp_val, val) || in ivpu_boot_top_noc_qrenqn_check()
347 if (!REG_TEST_FLD_NUM(VPU_40XX_TOP_NOC_QACCEPTN, CPU_CTRL, exp_val, val) || in ivpu_boot_top_noc_qacceptn_check()
358 if (!REG_TEST_FLD_NUM(VPU_40XX_TOP_NOC_QDENY, CPU_CTRL, exp_val, val) || in ivpu_boot_top_noc_qdeny_check()
444 val = REG_SET_FLD(VPU_40XX_TOP_NOC_QREQN, CPU_CTRL, val); in ivpu_boot_host_ss_top_noc_drive()
447 val = REG_CLR_FLD(VPU_40XX_TOP_NOC_QREQN, CPU_CTRL, val); in ivpu_boot_host_ss_top_noc_drive()

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