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Searched refs:CPG_DIV6_DIV_MASK (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/renesas/
H A Dclk-div6.c24 #define CPG_DIV6_DIV_MASK 0x3f macro
53 val = (readl(clock->reg) & ~(CPG_DIV6_DIV_MASK | CPG_DIV6_CKSTP)) in cpg_div6_clock_enable()
73 if (!(val & CPG_DIV6_DIV_MASK)) in cpg_div6_clock_disable()
74 val |= CPG_DIV6_DIV_MASK; in cpg_div6_clock_disable()
122 val = readl(clock->reg) & ~CPG_DIV6_DIV_MASK; in cpg_div6_clock_set_rate()
234 clock->div = (readl(clock->reg) & CPG_DIV6_DIV_MASK) + 1; in cpg_div6_register()
/kernel/linux/linux-6.6/drivers/clk/renesas/
H A Dclk-div6.c24 #define CPG_DIV6_DIV_MASK 0x3f macro
51 val = (readl(clock->reg) & ~(CPG_DIV6_DIV_MASK | CPG_DIV6_CKSTP)) in cpg_div6_clock_enable()
71 if (!(val & CPG_DIV6_DIV_MASK)) in cpg_div6_clock_disable()
72 val |= CPG_DIV6_DIV_MASK; in cpg_div6_clock_disable()
157 val = readl(clock->reg) & ~CPG_DIV6_DIV_MASK; in cpg_div6_clock_set_rate()
264 clock->div = (readl(clock->reg) & CPG_DIV6_DIV_MASK) + 1; in cpg_div6_register()

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