CNL_PORT_CL1CM_DW5 (reference) in projects: kernel

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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A D	intel_combo_phy.c	`145 ret &= check_phy_reg(dev_priv, phy, CNL_PORT_CL1CM_DW5, in cnl_combo_phy_verify_state() 166 val = intel_de_read(dev_priv, CNL_PORT_CL1CM_DW5); in cnl_combo_phys_init() 168 intel_de_write(dev_priv, CNL_PORT_CL1CM_DW5, val); in cnl_combo_phys_init()`
H A D	intel_ddi.c	`2427 val = intel_de_read(dev_priv, CNL_PORT_CL1CM_DW5); in cnl_ddi_vswing_sequence() 2429 intel_de_write(dev_priv, CNL_PORT_CL1CM_DW5, val); in cnl_ddi_vswing_sequence()`
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A D	i915_reg.h	`1883 #define CNL_PORT_CL1CM_DW5 _MMIO(0x162014) macro`