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Searched refs:CMP (Results 1 - 25 of 38) sorted by relevance

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/kernel/uniproton/src/arch/cpu/armv7-m/cortex-m4/
H A Dprt_vector.S101 CMP R0, #4 @stack length <4?
109 CMP R0, #4
111 CMP R0, #0 @four bytes align?
119 CMP R0, #0
127 CMP R0, #4 @bss length <4?
135 CMP R0, #4
137 CMP R0, #0 @four bytes align?
145 CMP R0, #0
H A Dprt_dispatch.S195 CMP R0, #OS_SVC_TSK_SWICH
198 CMP R0, #OS_SVC_VI2TASK
204 CMP R1, #0
216 CMP R3, #0
/kernel/liteos_a/arch/arm/arm/src/
H A Dlos_hw_exc.S134 CMP R1, #0
201 CMP R1, #CPSR_USER_MODE @ User mode
204 CMP R7, #119 @ __NR_sigreturn
271 CMP R0, #CPSR_USER_MODE @ User mode
279 CMP R0, #0
316 CMP R0, #0
391 CMP R2, #CPSR_USER_MODE @ User mode
404 CMP R4, #0
411 CMP R4, #0 @ if (g_intCount[ArchCurrCpuid()] > 0)
/kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/
H A Dlos_dispatch.S60 CMP R0, #0
80 CMP R1, #OS_FPU_CPACR_ENABLE
133 CMP R0, #0
147 CMP R3, #OS_FPU_CPACR_ENABLE
164 CMP R3, #OS_FPU_CPACR_ENABLE
H A Dlos_exc.S190 CMP R3, #0
201 CMP LR, #0xFFFFFFE9
229 CMP R2,#0
240 CMP LR, #0xFFFFFFED ;auto push floating registers
/kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/
H A Dlos_dispatch.S69 CMP R0, #0
91 CMP R1, #OS_FPU_CPACR_ENABLE
135 CMP R0, #0
160 CMP R3, #OS_FPU_CPACR_ENABLE
193 CMP R3, #OS_FPU_CPACR_ENABLE
H A Dlos_exc.S179 CMP R3, #0
190 CMP LR, #0xFFFFFFE9
218 CMP R2,#0
229 CMP LR, #0xFFFFFFED ;auto push floating registers
/kernel/liteos_m/arch/arm/cortex-m4/iar/
H A Dlos_dispatch.S60 CMP R0, #0
80 CMP R1, #OS_FPU_CPACR_ENABLE
135 CMP R0, #0
149 CMP R3, #OS_FPU_CPACR_ENABLE
166 CMP R3, #OS_FPU_CPACR_ENABLE
H A Dlos_exc.S190 CMP R3, #0
201 CMP LR, #0xFFFFFFE9
229 CMP R2,#0
240 CMP LR, #0xFFFFFFED ;auto push floating registers
/kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/
H A Dlos_dispatch.S60 CMP R0, #0
80 CMP R1, #OS_FPU_CPACR_ENABLE
133 CMP R0, #0
147 CMP R3, #OS_FPU_CPACR_ENABLE
164 CMP R3, #OS_FPU_CPACR_ENABLE
H A Dlos_exc.S190 CMP R3, #0
201 CMP LR, #0xFFFFFFE9
229 CMP R2,#0
240 CMP LR, #0xFFFFFFED ;auto push floating registers
/kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/
H A Dlos_dispatch.S69 CMP R0, #0
91 CMP R1, #OS_FPU_CPACR_ENABLE
135 CMP R0, #0
160 CMP R3, #OS_FPU_CPACR_ENABLE
193 CMP R3, #OS_FPU_CPACR_ENABLE
H A Dlos_exc.S179 CMP R3, #0
190 CMP LR, #0xFFFFFFE9
218 CMP R2,#0
229 CMP LR, #0xFFFFFFED ;auto push floating registers
/kernel/liteos_m/arch/arm/cortex-m7/iar/
H A Dlos_dispatch.S60 CMP R0, #0
80 CMP R1, #OS_FPU_CPACR_ENABLE
135 CMP R0, #0
149 CMP R3, #OS_FPU_CPACR_ENABLE
166 CMP R3, #OS_FPU_CPACR_ENABLE
/kernel/liteos_m/arch/arm/arm9/gcc/
H A Dlos_dispatch.S65 CMP R0, #OS_PSR_MODE_SYS
98 CMP R0, #OS_PSR_MODE_SYS
122 CMP R0, #0
/kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/
H A Dlos_exc.S247 CMP R3, #0
263 CMP LR, #0xFFFFFFE9
301 CMP R2,#0
312 CMP LR, #0xFFFFFFED //auto push floating registers
H A Dlos_dispatch.S52 CMP R0, #0
76 CMP R1, #OS_FPU_CPACR_ENABLE
174 CMP R3, #OS_FPU_CPACR_ENABLE
207 CMP R3, #OS_FPU_CPACR_ENABLE
/kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/
H A Dlos_exc.S247 CMP R3, #0
263 CMP LR, #0xFFFFFFE9
301 CMP R2,#0
312 CMP LR, #0xFFFFFFED //auto push floating registers
H A Dlos_dispatch.S52 CMP R0, #0
76 CMP R1, #OS_FPU_CPACR_ENABLE
174 CMP R3, #OS_FPU_CPACR_ENABLE
207 CMP R3, #OS_FPU_CPACR_ENABLE
/kernel/linux/linux-5.10/arch/sh/math-emu/
H A Dmath.c76 #define CMP(OP) ({ int r; BOTH_PRmn(OP##_X,r); r; }) macro
81 if (CMP(CMP) > 0) in fcmp_gt()
92 if (CMP(CMP /*EQ*/) == 0) in fcmp_eq()
/kernel/linux/linux-6.6/arch/sh/math-emu/
H A Dmath.c76 #define CMP(OP) ({ int r; BOTH_PRmn(OP##_X,r); r; }) macro
81 if (CMP(CMP) > 0) in fcmp_gt()
92 if (CMP(CMP /*EQ*/) == 0) in fcmp_eq()
/kernel/liteos_m/arch/arm/cortex-m3/keil/
H A Dlos_exc.S190 CMP R3, #0
201 CMP LR, #0xFFFFFFE9
229 CMP R2,#0
240 CMP LR, #0xFFFFFFED ;auto push floating registers
/kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/
H A Dlos_exc.S263 CMP R3, #0
279 CMP LR, #0xFFFFFFE9
317 CMP R2,#0
328 CMP LR, #0xFFFFFFED //auto push floating registers
/kernel/liteos_m/arch/arm/cortex-m4/gcc/
H A Dlos_exc.S278 CMP R3, #0
294 CMP LR, #0xFFFFFFE9
332 CMP R2,#0
343 CMP LR, #0xFFFFFFED //auto push floating registers
/kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/
H A Dlos_exc.S260 CMP R3, #0
276 CMP LR, #0xFFFFFFE9
314 CMP R2, #0
325 CMP LR, #0xFFFFFFED //auto push floating registers

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