Searched refs:CMD3 (Results 1 - 4 of 4) sorted by relevance
/kernel/linux/linux-5.10/drivers/net/ethernet/amd/ |
H A D | amd8111e.c | 435 writel((u32) VAL1|EN_PMGR, mmio + CMD3 ); in amd8111e_restart() 464 writel((u32)VAL2|JUMBO, mmio + CMD3); in amd8111e_restart() 471 writel((u32)JUMBO, mmio + CMD3); in amd8111e_restart() 475 writel((u32) VAL2|VSIZE|VL_TAG_DEL, mmio + CMD3); in amd8111e_restart() 575 writel( VAL2|JUMBO, mmio + CMD3); in amd8111e_init_hw_default() 577 writel(VAL2|VSIZE|VL_TAG_DEL, mmio + CMD3 ); in amd8111e_init_hw_default() 1312 buf[6] = readl(mmio + CMD3); in amd8111e_read_regs() 1553 writel( VAL1|MPPLBA, lp->mmio + CMD3); in amd8111e_enable_magicpkt()
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H A D | amd8111e.h | 30 Registers CMD0, CMD2, CMD3,CMD7 and INTEN0 uses a write access technique called command style access. It allows the write to selected bits of this register without altering the bits that are not selected. Command style registers are divided into 4 bytes that can be written independently. Higher order bit of each byte is the value bit that specifies the value that will be written into the selected bits of register. 48 #define CMD3 0x54 /* Command3 resiter */ macro
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/kernel/linux/linux-6.6/drivers/net/ethernet/amd/ |
H A D | amd8111e.c | 434 writel((u32)VAL1 | EN_PMGR, mmio + CMD3); in amd8111e_restart() 463 writel((u32)VAL2|JUMBO, mmio + CMD3); in amd8111e_restart() 470 writel((u32)JUMBO, mmio + CMD3); in amd8111e_restart() 474 writel((u32)VAL2 | VSIZE | VL_TAG_DEL, mmio + CMD3); in amd8111e_restart() 574 writel(VAL2 | JUMBO, mmio + CMD3); in amd8111e_init_hw_default() 576 writel(VAL2 | VSIZE | VL_TAG_DEL, mmio + CMD3); in amd8111e_init_hw_default() 1304 buf[6] = readl(mmio + CMD3); in amd8111e_read_regs() 1545 writel(VAL1 | MPPLBA, lp->mmio + CMD3); in amd8111e_enable_magicpkt()
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H A D | amd8111e.h | 30 Registers CMD0, CMD2, CMD3,CMD7 and INTEN0 uses a write access technique called command style access. It allows the write to selected bits of this register without altering the bits that are not selected. Command style registers are divided into 4 bytes that can be written independently. Higher order bit of each byte is the value bit that specifies the value that will be written into the selected bits of register. 48 #define CMD3 0x54 /* Command3 resiter */ macro
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