Searched refs:CLOCK_CNTL (Results 1 - 10 of 10) sorted by relevance
/kernel/linux/linux-5.10/drivers/video/fbdev/aty/ |
H A D | mach64_gx.c | 59 tmp = aty_ld_8(CLOCK_CNTL, par); in aty_StrobeClock() 60 aty_st_8(CLOCK_CNTL + par->clk_wr_offset, tmp | CLOCK_STROBE, par); in aty_StrobeClock() 411 tmp = aty_ld_8(CLOCK_CNTL, par); in aty_ICS2595_put1bit() 412 aty_st_8(CLOCK_CNTL + par->clk_wr_offset, in aty_ICS2595_put1bit() 415 tmp = aty_ld_8(CLOCK_CNTL, par); in aty_ICS2595_put1bit() 416 aty_st_8(CLOCK_CNTL + par->clk_wr_offset, (tmp & ~0x08) | (0 << 3), in aty_ICS2595_put1bit() 421 tmp = aty_ld_8(CLOCK_CNTL, par); in aty_ICS2595_put1bit() 422 aty_st_8(CLOCK_CNTL + par->clk_wr_offset, (tmp & ~0x08) | (1 << 3), in aty_ICS2595_put1bit() 441 old_clock_cntl = aty_ld_8(CLOCK_CNTL, par); in aty_set_pll18818() 442 aty_st_8(CLOCK_CNTL in aty_set_pll18818() [all...] |
H A D | mach64_ct.c | 306 aty_st_8(CLOCK_CNTL, par->clk_wr_offset | CLOCK_STROBE, par); in aty_set_pll_ct() 382 clock = aty_ld_8(CLOCK_CNTL, par) & 0x03U; in aty_get_pll_ct()
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H A D | atyfb_base.c | 2591 "DSP_ON_OFF CLOCK_CNTL\n" in aty_init() 2603 aty_ld_le32(CLOCK_CNTL, par)); in aty_init() 3087 clock_cntl = aty_ld_8(CLOCK_CNTL, par); in atyfb_setup_sparc() 3088 /* DPRINTK("CLOCK_CNTL %02x\n", clock_cntl); */ in atyfb_setup_sparc() 3098 * PLL Feedback Divider N (Dependent on CLOCK_CNTL): in atyfb_setup_sparc() 3103 * PLL Post Divider P (Dependent on CLOCK_CNTL): in atyfb_setup_sparc() 3508 par->clk_wr_offset = aty_ld_8(CLOCK_CNTL, par) & 0x03U; in atyfb_setup_generic() 3670 aty_st_le32(CLOCK_CNTL, 0x12345678, par); in atyfb_atari_probe() 3671 clock_r = aty_ld_le32(CLOCK_CNTL, par); in atyfb_atari_probe()
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/kernel/linux/linux-6.6/drivers/video/fbdev/aty/ |
H A D | mach64_gx.c | 59 tmp = aty_ld_8(CLOCK_CNTL, par); in aty_StrobeClock() 60 aty_st_8(CLOCK_CNTL + par->clk_wr_offset, tmp | CLOCK_STROBE, par); in aty_StrobeClock() 409 tmp = aty_ld_8(CLOCK_CNTL, par); in aty_ICS2595_put1bit() 410 aty_st_8(CLOCK_CNTL + par->clk_wr_offset, in aty_ICS2595_put1bit() 413 tmp = aty_ld_8(CLOCK_CNTL, par); in aty_ICS2595_put1bit() 414 aty_st_8(CLOCK_CNTL + par->clk_wr_offset, (tmp & ~0x08) | (0 << 3), in aty_ICS2595_put1bit() 419 tmp = aty_ld_8(CLOCK_CNTL, par); in aty_ICS2595_put1bit() 420 aty_st_8(CLOCK_CNTL + par->clk_wr_offset, (tmp & ~0x08) | (1 << 3), in aty_ICS2595_put1bit() 439 old_clock_cntl = aty_ld_8(CLOCK_CNTL, par); in aty_set_pll18818() 440 aty_st_8(CLOCK_CNTL in aty_set_pll18818() [all...] |
H A D | mach64_ct.c | 307 aty_st_8(CLOCK_CNTL, par->clk_wr_offset | CLOCK_STROBE, par); in aty_set_pll_ct() 383 clock = aty_ld_8(CLOCK_CNTL, par) & 0x03U; in aty_get_pll_ct()
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H A D | atyfb_base.c | 2596 "DSP_ON_OFF CLOCK_CNTL\n" in aty_init() 2608 aty_ld_le32(CLOCK_CNTL, par)); in aty_init() 3088 clock_cntl = aty_ld_8(CLOCK_CNTL, par); in atyfb_setup_sparc() 3089 /* DPRINTK("CLOCK_CNTL %02x\n", clock_cntl); */ in atyfb_setup_sparc() 3099 * PLL Feedback Divider N (Dependent on CLOCK_CNTL): in atyfb_setup_sparc() 3104 * PLL Post Divider P (Dependent on CLOCK_CNTL): in atyfb_setup_sparc() 3669 aty_st_le32(CLOCK_CNTL, 0x12345678, par); in atyfb_atari_probe() 3670 clock_r = aty_ld_le32(CLOCK_CNTL, par); in atyfb_atari_probe()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn314/ |
H A D | dcn314_dccg.h | 42 DCCG_SRII(CLOCK_CNTL, HDMICHARCLK, 0),\
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/kernel/linux/linux-5.10/include/video/ |
H A D | mach64.h | 117 #define CLOCK_CNTL 0x0090 /* Dword offset 0_24 */ macro 118 /* CLOCK_CNTL register constants CT LAYOUT */ 128 /* CLOCK_CNTL register constants GX LAYOUT */ 135 #define CLOCK_CNTL_ADDR CLOCK_CNTL + 1 138 #define CLOCK_CNTL_DATA CLOCK_CNTL + 2
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/kernel/linux/linux-6.6/include/video/ |
H A D | mach64.h | 117 #define CLOCK_CNTL 0x0090 /* Dword offset 0_24 */ macro 118 /* CLOCK_CNTL register constants CT LAYOUT */ 128 /* CLOCK_CNTL register constants GX LAYOUT */ 135 #define CLOCK_CNTL_ADDR CLOCK_CNTL + 1 138 #define CLOCK_CNTL_DATA CLOCK_CNTL + 2
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
H A D | dcn32_resource.h | 1289 DCCG_SRII(DTO_PARAM, DPPCLK, 3), DCCG_SRII(CLOCK_CNTL, HDMICHARCLK, 0), \
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