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Searched refs:CLK_TOP_MSDC50_3_HCLK_SEL (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt2712-clk.h165 #define CLK_TOP_MSDC50_3_HCLK_SEL 134 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A Dmt2712-clk.h165 #define CLK_TOP_MSDC50_3_HCLK_SEL 134 macro
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A Dmt2712-clk.h165 #define CLK_TOP_MSDC50_3_HCLK_SEL 134 macro
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt2712-clk.h165 #define CLK_TOP_MSDC50_3_HCLK_SEL 134 macro
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A Dclk-mt2712.c702 MUX_GATE(CLK_TOP_MSDC50_3_HCLK_SEL, "msdc50_3_h_sel", msdc50_0_h_parents,
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A Dclk-mt2712.c817 MUX_GATE(CLK_TOP_MSDC50_3_HCLK_SEL, "msdc50_3_h_sel",

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