Searched refs:CLK_TOP_MSDC50_0_H_SEL (Results 1 - 12 of 12) sorted by relevance
| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| H A D | mediatek,mt6795-clk.h | 103 #define CLK_TOP_MSDC50_0_H_SEL 92 macro
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| H A D | mt8173-clk.h | 105 #define CLK_TOP_MSDC50_0_H_SEL 95 macro
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| H A D | mt8192-clk.h | 35 #define CLK_TOP_MSDC50_0_H_SEL 23 macro
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| /kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mediatek,mt6795-clk.h | 103 #define CLK_TOP_MSDC50_0_H_SEL 92 macro
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| H A D | mt8173-clk.h | 105 #define CLK_TOP_MSDC50_0_H_SEL 95 macro
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| H A D | mt8192-clk.h | 35 #define CLK_TOP_MSDC50_0_H_SEL 23 macro
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| /kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt8173-clk.h | 105 #define CLK_TOP_MSDC50_0_H_SEL 95 macro
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| H A D | mt8173-clk.h | 105 #define CLK_TOP_MSDC50_0_H_SEL 95 macro
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| H A D | clk-mt6795-topckgen.c | 471 TOP_MUX_GATE(CLK_TOP_MSDC50_0_H_SEL, "msdc50_0_h_sel", msdc50_0_h_parents,
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| H A D | clk-mt8173-topckgen.c | 550 MUX_GATE_FLAGS(CLK_TOP_MSDC50_0_H_SEL, "msdc50_0_h_sel", msdc50_0_h_parents,
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| H A D | clk-mt8192.c | 602 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC50_0_H_SEL, "msdc50_0_h_sel",
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| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| H A D | clk-mt8173.c | 558 MUX_GATE(CLK_TOP_MSDC50_0_H_SEL, "msdc50_0_h_sel", msdc50_0_h_parents, 0x0070, 8, 3, 15),
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