Searched refs:CLK_TOP_MFG_SEL (Results 1 - 25 of 36) sorted by relevance
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| /kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 75 #define CLK_TOP_MFG_SEL 64 macro
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| H A D | mt6765-clk.h | 135 #define CLK_TOP_MFG_SEL 100 macro
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| H A D | mt8173-clk.h | 99 #define CLK_TOP_MFG_SEL 89 macro
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| H A D | mt2701-clk.h | 92 #define CLK_TOP_MFG_SEL 81 macro
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| H A D | mt2712-clk.h | 136 #define CLK_TOP_MFG_SEL 105 macro
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 75 #define CLK_TOP_MFG_SEL 64 macro
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| H A D | mt6765-clk.h | 135 #define CLK_TOP_MFG_SEL 100 macro
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| H A D | mt8173-clk.h | 99 #define CLK_TOP_MFG_SEL 89 macro
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| H A D | mt2701-clk.h | 92 #define CLK_TOP_MFG_SEL 81 macro
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| H A D | mt2712-clk.h | 136 #define CLK_TOP_MFG_SEL 105 macro
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| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| H A D | mediatek,mt6795-clk.h | 97 #define CLK_TOP_MFG_SEL 86 macro
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| H A D | mt8135-clk.h | 75 #define CLK_TOP_MFG_SEL 64 macro
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| H A D | mediatek,mt8365-clk.h | 75 #define CLK_TOP_MFG_SEL 65 macro
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| H A D | mt8173-clk.h | 99 #define CLK_TOP_MFG_SEL 89 macro
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| H A D | mt6765-clk.h | 135 #define CLK_TOP_MFG_SEL 100 macro
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| H A D | mt2701-clk.h | 92 #define CLK_TOP_MFG_SEL 81 macro
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| H A D | mt2712-clk.h | 136 #define CLK_TOP_MFG_SEL 105 macro
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| /kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mediatek,mt6795-clk.h | 97 #define CLK_TOP_MFG_SEL 86 macro
|
| H A D | mt8135-clk.h | 75 #define CLK_TOP_MFG_SEL 64 macro
|
| H A D | mediatek,mt8365-clk.h | 75 #define CLK_TOP_MFG_SEL 65 macro
|
| H A D | mt6765-clk.h | 135 #define CLK_TOP_MFG_SEL 100 macro
|
| H A D | mt8173-clk.h | 99 #define CLK_TOP_MFG_SEL 89 macro
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| H A D | mt2701-clk.h | 92 #define CLK_TOP_MFG_SEL 81 macro
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| H A D | mt2712-clk.h | 136 #define CLK_TOP_MFG_SEL 105 macro
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| H A D | clk-mt6795-topckgen.c | 463 TOP_MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents, 0x50, 24, 4, 31, 0),
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