CLK_TOP_DPILVDS1_SEL (reference) in projects: kernel - OpenGrok search results

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Searched refs:CLK_TOP_DPILVDS1_SEL (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	mt2712-clk.h	`150 #define CLK_TOP_DPILVDS1_SEL 119 macro`
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A D	mt2712-clk.h	`150 #define CLK_TOP_DPILVDS1_SEL 119 macro`
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A D	mt2712-clk.h	`150 #define CLK_TOP_DPILVDS1_SEL 119 macro`
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	mt2712-clk.h	`150 #define CLK_TOP_DPILVDS1_SEL 119 macro`
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A D	clk-mt2712.c	`678 MUX_GATE(CLK_TOP_DPILVDS1_SEL, "dpilvds1_sel", dpilvds1_parents,`
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A D	clk-mt2712.c	`783 MUX_GATE(CLK_TOP_DPILVDS1_SEL, "dpilvds1_sel",`

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