Home
last modified time | relevance | path

Searched refs:CLK_TOP_CAMTG (Results 1 - 15 of 15) sorted by relevance

/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt6779-clk.h15 #define CLK_TOP_CAMTG 5 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A Dmt6779-clk.h15 #define CLK_TOP_CAMTG 5 macro
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A Dmt8186-clk.h22 #define CLK_TOP_CAMTG 3 macro
H A Dmt6779-clk.h15 #define CLK_TOP_CAMTG 5 macro
H A Dmediatek,mt8188-clk.h32 #define CLK_TOP_CAMTG 21 macro
H A Dmt8195-clk.h33 #define CLK_TOP_CAMTG 21 macro
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt6779-clk.h15 #define CLK_TOP_CAMTG 5 macro
H A Dmt8186-clk.h22 #define CLK_TOP_CAMTG 3 macro
H A Dmediatek,mt8188-clk.h32 #define CLK_TOP_CAMTG 21 macro
H A Dmt8195-clk.h33 #define CLK_TOP_CAMTG 21 macro
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A Dclk-mt8186-topckgen.c513 MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG, "top_camtg",
H A Dclk-mt8188-topckgen.c1007 MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG, "top_camtg",
H A Dclk-mt6779.c675 MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG, "camtg_sel", camtg_parents,
H A Dclk-mt8195-topckgen.c915 MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG, "top_camtg",
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A Dclk-mt6779.c675 MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG, "camtg_sel", camtg_parents,

Completed in 25 milliseconds