Searched refs:CLK_TOP_ARMPLL_DIVIDER_PLL0 (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 108 #define CLK_TOP_ARMPLL_DIVIDER_PLL0 73 macro
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 108 #define CLK_TOP_ARMPLL_DIVIDER_PLL0 73 macro
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| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 108 #define CLK_TOP_ARMPLL_DIVIDER_PLL0 73 macro
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| /kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 108 #define CLK_TOP_ARMPLL_DIVIDER_PLL0 73 macro
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| H A D | clk-mt6765.c | 156 FACTOR(CLK_TOP_ARMPLL_DIVIDER_PLL0, "arm_div_pll0", "syspll_d2", 1, 1),
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| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| H A D | clk-mt6765.c | 155 FACTOR(CLK_TOP_ARMPLL_DIVIDER_PLL0, "arm_div_pll0", "syspll_d2", 1, 1),
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