Searched refs:CLK_TOP_APLL_DIV5 (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt2712-clk.h | 206 #define CLK_TOP_APLL_DIV5 175 macro
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| H A D | mt2712-clk.h | 206 #define CLK_TOP_APLL_DIV5 175 macro
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| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| H A D | mt2712-clk.h | 206 #define CLK_TOP_APLL_DIV5 175 macro
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| /kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt2712-clk.h | 206 #define CLK_TOP_APLL_DIV5 175 macro
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| H A D | clk-mt2712.c | 798 DIV_ADJ(CLK_TOP_APLL_DIV5, "apll_div5", "i2si1_sel", 0x128, 8, 8),
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| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| H A D | clk-mt2712.c | 943 DIV_ADJ(CLK_TOP_APLL_DIV5, "apll_div5", "i2si1_sel", 0x128, 8, 8),
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