| /kernel/linux/linux-5.10/sound/soc/mediatek/mt8183/ |
| H A D | mt8183-afe-clk.c | 49 CLK_TOP_APLL12_DIVB, enumerator
88 [CLK_TOP_APLL12_DIVB] = "top_apll12_divb",
534 .div_clk_id = CLK_TOP_APLL12_DIVB,
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| /kernel/linux/linux-6.6/sound/soc/mediatek/mt8183/ |
| H A D | mt8183-afe-clk.c | 49 CLK_TOP_APLL12_DIVB, enumerator
88 [CLK_TOP_APLL12_DIVB] = "top_apll12_divb",
534 .div_clk_id = CLK_TOP_APLL12_DIVB,
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| /kernel/linux/linux-6.6/sound/soc/mediatek/mt8192/ |
| H A D | mt8192-afe-clk.h | 211 CLK_TOP_APLL12_DIVB, enumerator
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| H A D | mt8192-afe-clk.c | 54 [CLK_TOP_APLL12_DIVB] = "top_apll12_divb",
487 .div_clk_id = CLK_TOP_APLL12_DIVB,
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| /kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt6779-clk.h | 143 #define CLK_TOP_APLL12_DIVB 133 macro
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| H A D | mt8183-clk.h | 163 #define CLK_TOP_APLL12_DIVB 127 macro
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| H A D | mt6779-clk.h | 143 #define CLK_TOP_APLL12_DIVB 133 macro
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| H A D | mt8183-clk.h | 163 #define CLK_TOP_APLL12_DIVB 127 macro
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| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| H A D | mt8183-clk.h | 163 #define CLK_TOP_APLL12_DIVB 127 macro
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| H A D | mt6779-clk.h | 143 #define CLK_TOP_APLL12_DIVB 133 macro
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| H A D | mt8192-clk.h | 159 #define CLK_TOP_APLL12_DIVB 147 macro
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| /kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt6779-clk.h | 143 #define CLK_TOP_APLL12_DIVB 133 macro
|
| H A D | mt8183-clk.h | 163 #define CLK_TOP_APLL12_DIVB 127 macro
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| H A D | mt8192-clk.h | 159 #define CLK_TOP_APLL12_DIVB 147 macro
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| H A D | clk-mt8183.c | 630 DIV_GATE(CLK_TOP_APLL12_DIVB, "apll12_divb", "apll12_div4", 0x320, 7, 0x328, 8, 8),
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| H A D | clk-mt6779.c | 837 DIV_GATE(CLK_TOP_APLL12_DIVB, "apll12_divb", "apll12_div4",
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| H A D | clk-mt8192.c | 705 DIV_GATE(CLK_TOP_APLL12_DIVB, "apll12_divb", "apll12_div4", 0x320, 5, 0x334, 8, 8),
|
| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| H A D | clk-mt8183.c | 746 DIV_GATE(CLK_TOP_APLL12_DIVB, "apll12_divb", "apll12_div4",
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| H A D | clk-mt6779.c | 837 DIV_GATE(CLK_TOP_APLL12_DIVB, "apll12_divb", "apll12_div4",
|