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Searched refs:CLK_DSIM0 (Results 1 - 18 of 18) sorted by relevance

/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dexynos5250.h144 #define CLK_DSIM0 341 macro
H A Dexynos4.h124 #define CLK_DSIM0 286 macro
H A Dexynos3250.h193 #define CLK_DSIM0 187 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A Dexynos5250.h144 #define CLK_DSIM0 341 macro
H A Dexynos4.h124 #define CLK_DSIM0 286 macro
H A Dexynos3250.h193 #define CLK_DSIM0 187 macro
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A Dexynos5250.h145 #define CLK_DSIM0 341 macro
H A Dexynos4.h124 #define CLK_DSIM0 286 macro
H A Dexynos3250.h193 #define CLK_DSIM0 187 macro
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dexynos5250.h145 #define CLK_DSIM0 341 macro
H A Dexynos4.h124 #define CLK_DSIM0 286 macro
H A Dexynos3250.h193 #define CLK_DSIM0 187 macro
/kernel/linux/linux-5.10/drivers/clk/samsung/
H A Dclk-exynos3250.c623 GATE(CLK_DSIM0, "dsim0", "div_aclk_160", GATE_IP_LCD, 3, 0, 0),
H A Dclk-exynos5250.c657 GATE(CLK_DSIM0, "dsim0", "mout_aclk200_disp1_sub", GATE_IP_DISP1, 3, 0,
H A Dclk-exynos4.c720 GATE(CLK_DSIM0, "dsim0", "aclk160", GATE_IP_LCD0, 3, 0, 0),
/kernel/linux/linux-6.6/drivers/clk/samsung/
H A Dclk-exynos5250.c660 GATE(CLK_DSIM0, "dsim0", "mout_aclk200_disp1_sub", GATE_IP_DISP1, 3, 0,
H A Dclk-exynos3250.c628 GATE(CLK_DSIM0, "dsim0", "div_aclk_160", GATE_IP_LCD, 3, 0, 0),
H A Dclk-exynos4.c724 GATE(CLK_DSIM0, "dsim0", "aclk160", GATE_IP_LCD0, 3, 0, 0),

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