Searched refs:CLASS2_ENABLE_MAILBOX_INTR (Results 1 - 8 of 8) sorted by relevance
| /kernel/linux/linux-5.10/arch/powerpc/platforms/cell/spufs/ |
| H A D | hw_ops.c | 65 spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR); in spu_hw_mbox_stat_poll()
96 spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR); in spu_hw_ibox_read()
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| H A D | backing_ops.c | 98 CLASS2_ENABLE_MAILBOX_INTR; in spu_backing_mbox_stat_poll()
132 ctx->csa.priv1.int_mask_class2_RW |= CLASS2_ENABLE_MAILBOX_INTR; in spu_backing_ibox_read()
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| H A D | switch.c | 1684 spu_int_stat_clear(spu, 2, CLASS2_ENABLE_MAILBOX_INTR); in check_ppuint_mb_stat()
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| /kernel/linux/linux-6.6/arch/powerpc/platforms/cell/spufs/ |
| H A D | hw_ops.c | 65 spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR); in spu_hw_mbox_stat_poll()
96 spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR); in spu_hw_ibox_read()
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| H A D | backing_ops.c | 98 CLASS2_ENABLE_MAILBOX_INTR; in spu_backing_mbox_stat_poll()
132 ctx->csa.priv1.int_mask_class2_RW |= CLASS2_ENABLE_MAILBOX_INTR; in spu_backing_ibox_read()
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| H A D | switch.c | 1682 spu_int_stat_clear(spu, 2, CLASS2_ENABLE_MAILBOX_INTR); in check_ppuint_mb_stat()
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| H A D | spu.h | 509 #define CLASS2_ENABLE_MAILBOX_INTR 0x1L macro
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| /kernel/linux/linux-6.6/arch/powerpc/include/asm/ |
| H A D | spu.h | 476 #define CLASS2_ENABLE_MAILBOX_INTR 0x1L macro
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