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Searched refs:CHL_INT0_SL_PHY_ENABLE_MSK (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/scsi/hisi_sas/
H A Dhisi_sas_v2_hw.c229 #define CHL_INT0_SL_PHY_ENABLE_MSK (0x1 << CHL_INT0_SL_PHY_ENABLE_OFF) macro
2715 CHL_INT0_SL_PHY_ENABLE_MSK); in phy_up_v2_hw()
2779 CHL_INT0_SL_PHY_ENABLE_MSK)) { in int_phy_updown_v2_hw()
2781 case CHL_INT0_SL_PHY_ENABLE_MSK: in int_phy_updown_v2_hw()
2796 CHL_INT0_SL_PHY_ENABLE_MSK): in int_phy_updown_v2_hw()
2933 & (~CHL_INT0_SL_PHY_ENABLE_MSK) in int_chnl_int_v2_hw()
H A Dhisi_sas_v3_hw.c256 #define CHL_INT0_SL_PHY_ENABLE_MSK (0x1 << CHL_INT0_SL_PHY_ENABLE_OFF) macro
1567 CHL_INT0_SL_PHY_ENABLE_MSK); in phy_up_v3_hw()
1637 if (irq_value & CHL_INT0_SL_PHY_ENABLE_MSK) in int_phy_up_down_bcast_v3_hw()
1837 & (~CHL_INT0_SL_PHY_ENABLE_MSK) in handle_chl_int0_v3_hw()
/kernel/linux/linux-6.6/drivers/scsi/hisi_sas/
H A Dhisi_sas_v2_hw.c229 #define CHL_INT0_SL_PHY_ENABLE_MSK (0x1 << CHL_INT0_SL_PHY_ENABLE_OFF) macro
2711 CHL_INT0_SL_PHY_ENABLE_MSK); in phy_up_v2_hw()
2776 CHL_INT0_SL_PHY_ENABLE_MSK)) { in int_phy_updown_v2_hw()
2778 case CHL_INT0_SL_PHY_ENABLE_MSK: in int_phy_updown_v2_hw()
2793 CHL_INT0_SL_PHY_ENABLE_MSK): in int_phy_updown_v2_hw()
2928 & (~CHL_INT0_SL_PHY_ENABLE_MSK) in int_chnl_int_v2_hw()
H A Dhisi_sas_v3_hw.c258 #define CHL_INT0_SL_PHY_ENABLE_MSK (0x1 << CHL_INT0_SL_PHY_ENABLE_OFF) macro
1631 CHL_INT0_SL_PHY_ENABLE_MSK); in phy_up_v3_hw()
1700 if (irq_value & CHL_INT0_SL_PHY_ENABLE_MSK) in int_phy_up_down_bcast_v3_hw()
1906 & (~CHL_INT0_SL_PHY_ENABLE_MSK) in handle_chl_int0_v3_hw()

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